公开(公告)号：US08006204B2

公开(公告)日：2011-08-23

申请号：US11391773

申请日：2006-03-27

申请人： Earl A. Killian ,  Ricardo E. Gonzalez ,  Ashish B. Dixit ,  Monica Lam ,  Walter D. Lichtenstein ,  Christopher Rowen ,  John C. Ruttenberg ,  Robert P. Wilson ,  Albert Ren-Rui Wang ,  Dror Eliezer Maydan

发明人： Earl A. Killian ,  Ricardo E. Gonzalez ,  Ashish B. Dixit ,  Monica Lam ,  Walter D. Lichtenstein ,  Christopher Rowen ,  John C. Ruttenberg ,  Robert P. Wilson ,  Albert Ren-Rui Wang ,  Dror Eliezer Maydan

IPC分类号： G06F17/50

CPC分类号： G06F17/5045 ,  G06F8/20 ,  G06F8/41 ,  G06F8/53 ,  G06F2217/04 ,  G06F2217/68

摘要： An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

摘要翻译： 自动处理器设计工具使用标准化语言对定制的处理器指令集扩展进行描述，以开发目标指令集的可配置定义，实现指令集所需的电路的硬件描述语言描述，以及开发工具，如编译器 ，汇编器，调试器和模拟器，可用于开发处理器的应用程序并进行验证。 处理器电路的实现可针对诸如面积，功耗，速度等的各种标准进行优化。 一旦开发了处理器配置，就可以对其进行测试，并修改系统的输入以迭代地优化处理器实现。 通过提供扩展和优化的限制域，该过程可以高度自动化，从而促进快速可靠的开发。

公开(公告)号：US20080086728A1

公开(公告)日：2008-04-10

申请号：US11833214

申请日：2007-08-02

申请人： Monica Lam ,  Andrew Berkheimer ,  Constantine Sapuntzakis ,  John Whaley ,  Ramesh Chandra ,  Michael Chen ,  Won-Suk Chun ,  Kelvin Yue

发明人： Monica Lam ,  Andrew Berkheimer ,  Constantine Sapuntzakis ,  John Whaley ,  Ramesh Chandra ,  Michael Chen ,  Won-Suk Chun ,  Kelvin Yue

IPC分类号： G06F9/455

CPC分类号： G06F8/63 ,  G06F8/658 ,  G06F9/44505 ,  G06F9/45533 ,  G06F17/30233

摘要： Methods, systems, and apparatus, including computer program apparatus, implementing techniques for publishing, subscribing to, or playing live appliances. A live appliance includes a current virtual machine image. In publishing, a proxy file of a live appliance file type is provided to the publisher. The type is mapped to a live appliance player; so that when a proxy file is opened, the current virtual machine image is run. The player automatically binds a writeable file system external to the virtual machine image to the image to provide file storage that is accessible from within the virtual machine image and from a host operating system. The player also creates a subscription to the live appliance on the host computer if one does not exist when the proxy file is run. With the subscription, the player runs the then-current virtual machine image whenever the live appliance is run.

摘要翻译： 方法，系统和装置，包括计算机程序装置，用于发布，订阅或播放活
动电器的技术。 活动设备包括当前的虚拟机映像。 在发布时，会向发布商提供活动家电文件类型的代理文件。 该类型映射到活动家电播放器; 以便当代理文件打开时，将运行当前的虚拟机映像。 播放器自动将虚拟机映像外部的可写文件系统绑定到映像，以提供可从虚拟机映像和主机操作系统访问的文件存储。 如果代理文件运行时，播放器还会在主机上创建对主机的订阅。 通过订阅，播放器将在运行live设备时运行当前的虚拟机映像。

公开(公告)号：US20080086727A1

公开(公告)日：2008-04-10

申请号：US11833213

申请日：2007-08-02

申请人： Monica Lam ,  Andrew Berkheimer ,  Constantine Sapuntzakis ,  John Whaley ,  Ramesh Chandra ,  Michael Chen ,  Won Chun ,  Kelvin Yue

发明人： Monica Lam ,  Andrew Berkheimer ,  Constantine Sapuntzakis ,  John Whaley ,  Ramesh Chandra ,  Michael Chen ,  Won Chun ,  Kelvin Yue

IPC分类号： G06F9/455

CPC分类号： G06F8/63 ,  G06F8/658 ,  G06F9/44505 ,  G06F9/45533 ,  G06F16/188

摘要： Methods, systems, and apparatus, including computer program apparatus, implementing techniques for publishing, subscribing to, or playing live appliances. A live appliance includes a current virtual machine image. In publishing, a proxy file of a live appliance file type is provided to the publisher. The type is mapped to a live appliance player; so that when a proxy file is opened, the current virtual machine image is run. The player automatically binds a writeable file system external to the virtual machine image to the image to provide file storage that is accessible from within the virtual machine image and from a host operating system. The player also creates a subscription to the live appliance on the host computer if one does not exist when the proxy file is run. With the subscription, the player runs the then-current virtual machine image whenever the live appliance is run.

摘要翻译： 方法，系统和装置，包括计算机程序装置，用于发布，订阅或播放活
动电器的技术。 活动设备包括当前的虚拟机映像。 在发布时，会向发布商提供活动家电文件类型的代理文件。 该类型映射到活动家电播放器; 以便当代理文件打开时，将运行当前的虚拟机映像。 播放器自动将虚拟机映像外部的可写文件系统绑定到映像，以提供可从虚拟机映像和主机操作系统访问的文件存储。 如果代理文件运行时，播放器还会在主机上创建对主机的订阅。 通过订阅，播放器将在运行live设备时运行当前的虚拟机映像。

公开(公告)号：US20080034364A1

公开(公告)日：2008-02-07

申请号：US11833208

申请日：2007-08-02

申请人： Monica Lam ,  Andrew Berkheimer ,  Constantine Sapuntzakis ,  John Whaley ,  Ramesh Chandra ,  Michael Chen ,  Won-Suk Chun ,  Kelvin Yue

发明人： Monica Lam ,  Andrew Berkheimer ,  Constantine Sapuntzakis ,  John Whaley ,  Ramesh Chandra ,  Michael Chen ,  Won-Suk Chun ,  Kelvin Yue

IPC分类号： G06F9/455

CPC分类号： G06F8/63 ,  G06F8/658 ,  G06F9/44505 ,  G06F9/45533 ,  G06F17/30233

摘要： Methods, systems, and apparatus, including computer program apparatus, implementing techniques for publishing, subscribing to, or playing live appliances. A live appliance includes a current virtual machine image. In publishing, a proxy file of a live appliance file type is provided to the publisher. The type is mapped to a live appliance player; so that when a proxy file is opened, the current virtual machine image is run. The player automatically binds a writeable file system external to the virtual machine image to the image to provide file storage that is accessible from within the virtual machine image and from a host operating system. The player also creates a subscription to the live appliance on the host computer if one does not exist when the proxy file is run. With the subscription, the player runs the then-current virtual machine image whenever the live appliance is run.

摘要翻译： 方法，系统和装置，包括计算机程序装置，用于发布，订阅或播放活
动电器的技术。 活动设备包括当前的虚拟机映像。 在发布时，会向发布商提供活动家电文件类型的代理文件。 该类型映射到活动家电播放器; 以便当代理文件打开时，将运行当前的虚拟机映像。 播放器自动将虚拟机映像外部的可写文件系统绑定到映像，以提供可从虚拟机映像和主机操作系统访问的文件存储。 如果代理文件运行时，播放器还会在主机上创建对主机的订阅。 通过订阅，播放器将在运行live设备时运行当前的虚拟机映像。

公开(公告)号：US06760888B2

公开(公告)日：2004-07-06

申请号：US10286496

申请日：2002-11-01

申请人： Earl A. Killian ,  Ricardo E. Gonzalez ,  Ashish B. Dixit ,  Monica Lam ,  Walter D. Lichtenstein ,  Christopher Rowen ,  John C. Ruttenberg ,  Robert P. Wilson ,  Albert Ren-Rui Wang ,  D{grave over (r)}or Eliezer Maydan

发明人： Earl A. Killian ,  Ricardo E. Gonzalez ,  Ashish B. Dixit ,  Monica Lam ,  Walter D. Lichtenstein ,  Christopher Rowen ,  John C. Ruttenberg ,  Robert P. Wilson ,  Albert Ren-Rui Wang ,  D{grave over (r)}or Eliezer Maydan

IPC分类号： G06F1750

CPC分类号： G06F17/5045 ,  G06F8/20 ,  G06F8/41 ,  G06F8/53 ,  G06F2217/04 ,  G06F2217/68

摘要： An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

摘要翻译： 自动处理器设计工具使用标准化语言对定制的处理器指令集扩展进行描述，以开发目标指令集的可配置定义，实现指令集所需的电路的硬件描述语言描述，以及开发工具，如编译器 ，汇编器，调试器和模拟器，可用于开发处理器的应用程序并进行验证。 处理器电路的实现可针对诸如面积，功耗，速度等的各种标准进行优化。 一旦开发了处理器配置，就可以对其进行测试，并修改系统的输入以迭代地优化处理器实现。 通过提供扩展和优化的限制域，该过程可以高度自动化，从而促进快速可靠的开发。

公开(公告)号：US08875068B2

公开(公告)日：2014-10-28

申请号：US12135563

申请日：2008-06-09

申请人： Earl A. Killian ,  Ricardo E. Gonzalez ,  Ashish B. Dixit ,  Monica Lam ,  Walter D. Lichtenstein ,  Christopher Rowen ,  John C. Ruttenberg ,  Robert P. Wilson ,  Albert Ren-Rui Wang ,  Dror Eliezer Maydan

发明人： Earl A. Killian ,  Ricardo E. Gonzalez ,  Ashish B. Dixit ,  Monica Lam ,  Walter D. Lichtenstein ,  Christopher Rowen ,  John C. Ruttenberg ,  Robert P. Wilson ,  Albert Ren-Rui Wang ,  Dror Eliezer Maydan

IPC分类号： G06F17/50

CPC分类号： G06F17/5045 ,  G06F8/20 ,  G06F8/41 ,  G06F8/53 ,  G06F2217/04 ,  G06F2217/68

摘要： An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

摘要翻译： 自动处理器设计工具使用标准化语言对定制的处理器指令集扩展进行描述，以开发目标指令集的可配置定义，实现指令集所需的电路的硬件描述语言描述，以及开发工具，如编译器 ，汇编器，调试器和模拟器，可用于开发处理器的应用程序并进行验证。 处理器电路的实现可针对诸如面积，功耗，速度等的各种标准进行优化。 一旦开发了处理器配置，就可以对其进行测试，并修改系统的输入以迭代地优化处理器实现。 通过提供扩展和优化的限制域，该过程可以高度自动化，从而促进快速可靠的开发。

公开(公告)号：US20060259878A1

公开(公告)日：2006-11-16

申请号：US11391773

申请日：2006-03-27

申请人： Earl Killian ,  Ricardo Gonzalez ,  Ashish Dixit ,  Monica Lam ,  Walter Lichtenstein ,  Christopher Rowen ,  John Ruttenberg ,  Robert Wilson ,  Albert Wang ,  Dror Maydan

发明人： Earl Killian ,  Ricardo Gonzalez ,  Ashish Dixit ,  Monica Lam ,  Walter Lichtenstein ,  Christopher Rowen ,  John Ruttenberg ,  Robert Wilson ,  Albert Wang ,  Dror Maydan

IPC分类号： G06F17/50

CPC分类号： G06F17/5045 ,  G06F8/20 ,  G06F8/41 ,  G06F8/53 ,  G06F2217/04 ,  G06F2217/68

摘要： An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

公开(公告)号：US07020854B2

公开(公告)日：2006-03-28

申请号：US10884590

申请日：2004-07-02

申请人： Earl A. Killian ,  Ricardo E. Gonzalez ,  Ashish B. Dixit ,  Monica Lam ,  Walter D. Lichtenstein ,  Christopher Rowen ,  John C. Ruttenberg ,  Robert P. Wilson ,  Albert Ren-Rui Wang ,  Dror Eliezer Maydan

发明人： Earl A. Killian ,  Ricardo E. Gonzalez ,  Ashish B. Dixit ,  Monica Lam ,  Walter D. Lichtenstein ,  Christopher Rowen ,  John C. Ruttenberg ,  Robert P. Wilson ,  Albert Ren-Rui Wang ,  Dror Eliezer Maydan

IPC分类号： G06F17/50 ,  G06F15/00

CPC分类号： G06F17/5045 ,  G06F8/20 ,  G06F8/41 ,  G06F8/53 ,  G06F2217/04 ,  G06F2217/68

摘要： An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

公开(公告)号：US20080244506A1

公开(公告)日：2008-10-02

申请号：US12135502

申请日：2008-06-09

申请人： Earl A. Killian ,  Richardo E. Gonzalez ,  Ashish B. Dixit ,  Monica Lam ,  Walter D. Lichtenstein ,  Christopher Rowen ,  John C. Ruttenberg ,  Robert P. Wilson ,  Albert Ren-Ru Wang ,  Dror Eliezer Maydan

发明人： Earl A. Killian ,  Richardo E. Gonzalez ,  Ashish B. Dixit ,  Monica Lam ,  Walter D. Lichtenstein ,  Christopher Rowen ,  John C. Ruttenberg ,  Robert P. Wilson ,  Albert Ren-Ru Wang ,  Dror Eliezer Maydan

IPC分类号： G06F9/44

CPC分类号： G06F17/5045 ,  G06F8/20 ,  G06F8/41 ,  G06F8/53 ,  G06F2217/04 ,  G06F2217/68

摘要： An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

摘要翻译： 自动处理器设计工具使用标准化语言对定制的处理器指令集扩展进行描述，以开发目标指令集的可配置定义，实现指令集所需的电路的硬件描述语言描述，以及开发工具，如编译器 ，汇编器，调试器和模拟器，可用于开发处理器的应用程序并进行验证。 处理器电路的实现可针对诸如面积，功耗，速度等的各种标准进行优化。 一旦开发了处理器配置，就可以对其进行测试，并修改系统的输入以迭代地优化处理器实现。 通过提供扩展和优化的限制域，该过程可以高度自动化，从而促进快速可靠的开发。

公开(公告)号：US20080244471A1

公开(公告)日：2008-10-02

申请号：US12135563

申请日：2008-06-09

申请人： Earl A. Killian ,  Ricardo E. Gonzalez ,  Ashish B. Dixit ,  Monica Lam ,  Walter D. Lichtenstein ,  Christopher Rowen ,  John C. Ruttenberg ,  Robert P. Wilson ,  Albert Ren-Rui Wang ,  Dror Eliezer Maydan

发明人： Earl A. Killian ,  Ricardo E. Gonzalez ,  Ashish B. Dixit ,  Monica Lam ,  Walter D. Lichtenstein ,  Christopher Rowen ,  John C. Ruttenberg ,  Robert P. Wilson ,  Albert Ren-Rui Wang ,  Dror Eliezer Maydan

IPC分类号： G06F17/50

CPC分类号： G06F17/5045 ,  G06F8/20 ,  G06F8/41 ,  G06F8/53 ,  G06F2217/04 ,  G06F2217/68

摘要： An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

摘要翻译： 自动处理器设计工具使用标准化语言对定制的处理器指令集扩展进行描述，以开发目标指令集的可配置定义，实现指令集所需的电路的硬件描述语言描述，以及开发工具，如编译器 ，汇编器，调试器和模拟器，可用于开发处理器的应用程序并进行验证。 处理器电路的实现可针对诸如面积，功耗，速度等的各种标准进行优化。 一旦开发了处理器配置，就可以对其进行测试，并修改系统的输入以迭代地优化处理器实现。 通过提供扩展和优化的限制域，该过程可以高度自动化，从而促进快速可靠的开发。