Method and apparatus for software controlled timing of embedded memory
    5.
    发明授权
    Method and apparatus for software controlled timing of embedded memory 有权
    嵌入式存储器的软件控制时序的方法和装置

    公开(公告)号:US06366990B1

    公开(公告)日:2002-04-02

    申请号:US09211987

    申请日:1998-12-14

    IPC分类号: G06F1200

    摘要: A method and apparatus for software controlled timing of embedded memory includes an embedded memory array and input/output (I/O) control circuitry coupled to the embedded memory array. The I/O control circuitry provides a plurality of I/O signals to the embedded memory array to control the input of data to the embedded memory array and output of data from the embedded memory array. The I/O control circuitry also includes programmable delay circuitry to alter the timing of the I/O signals.

    摘要翻译: 用于嵌入式存储器的软件控制定时的方法和装置包括嵌入式存储器阵列和耦合到嵌入式存储器阵列的输入/输出(I / O)控制电路。 I / O控制电路向嵌入式存储器阵列提供多个I / O信号,以控制数据到嵌入式存储器阵列的输入以及从嵌入式存储器阵列输出数据。 I / O控制电路还包括可编程延迟电路,以改变I / O信号的时序。