Acaricidal compositions and methods of use thereof
    8.
    发明授权
    Acaricidal compositions and methods of use thereof 有权
    杀螨组合物及其使用方法

    公开(公告)号:US07575758B2

    公开(公告)日:2009-08-18

    申请号:US11520384

    申请日:2006-09-13

    CPC分类号: C07K14/43518 A01N63/02

    摘要: A method of controlling acarine pests comprises applying to the locus of the acarine pests, an isolated polypeptide toxin, wherein the polypeptide toxin has acaricidal activity. In one embodiment, the polypeptide toxin comprises three intrachain disulfide bonds and/or is a component of a venom of an Australian funnel web spider of the genus Atrax or Hadronyche. The polypeptide toxins may be applied to the acarine pests themselves, to the environment of the acarine pests, to the hosts of the acarine pests, or to an animal vector of the acarine pests, for example.

    摘要翻译: 控制螨类害虫的方法包括向螨害虫的场所施用分离的多肽毒素,其中所述多肽毒素具有杀螨活性。 在一个实施方案中,多肽毒素包含三个链内二硫键和/或是Atrax或Hadronyche属的澳大利亚漏斗网蜘蛛的毒液的组分。 例如,可以将多肽毒素本身施用于螨类害虫的环境,螨虫的宿主或螨类害虫的动物载体。

    Static random access memory SRAM having weak write test circuit
    10.
    发明授权
    Static random access memory SRAM having weak write test circuit 失效
    具有弱写入测试电路的静态随机存取存储器SRAM

    公开(公告)号:US5559745A

    公开(公告)日:1996-09-24

    申请号:US529016

    申请日:1995-09-15

    摘要: A test circuit and method for testing a memory cell in a static random access memory. The memory cell is coupled to a bit line and a complementary bit line. The test circuit includes a charging device coupled to selectively charge one of the bit line or the complementary bit line and a discharging device coupled to selectively discharge the other of the bit line and the complementary bit line. To test a memory cell containing the first value, the test circuit performs a weak write of the second value to the memory cell. The weak write overwrites the first value contained in the memory cell with the second value if the memory cell is defective. The memory cell retains the first value if functioning properly.

    摘要翻译: 一种用于测试静态随机存取存储器中的存储单元的测试电路和方法。 存储单元耦合到位线和互补位线。 测试电路包括耦合以选择性地对位线或互补位线中的一个进行充电的充电装置和耦合以选择性地放电位线和互补位线中的另一个的放电装置。 为了测试包含第一个值的存储单元,测试电路对存储单元执行第二个值的弱写入。 如果存储单元有故障,弱写将用第二个值覆盖存储单元中包含的第一个值。 如果功能正常,则存储单元保留第一个值。