公开(公告)号：US08072075B2

公开(公告)日：2011-12-06

申请号：US12439910

申请日：2007-08-29

申请人： Nicolas Jourdan ,  Laurant Georges Gosset ,  Joaquin Torres

发明人： Nicolas Jourdan ,  Laurant Georges Gosset ,  Joaquin Torres

IPC分类号： H01L23/48 ,  H01L21/4763

CPC分类号： H01L21/76831 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76867 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76886 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention relates to an integrated-circuit device that has at least one Copper-containing feature in a dielectric layer, and a diffusion-barrier layer stack arranged between the feature and the dielectric layer. The integrated-circuit device of the invention has a diffusion-barrier layer stack, which comprises, in a direction from the Copper-containing feature to the dielectric layer, a CuSiN layer and a SiN layer. This layer combination provides an efficient barrier for suppressing Copper diffusion from the feature into the dielectric layer. Furthermore, a CuSiN/SiN layer sequence provides an improved adhesion between the layers of the diffusion-barrier layer stack and the dielectric layer, and thus improves the electromigration performance of the integrated-circuit device during operation. Therefore, the reliability of device operation and the lifetime of the integrate-circuit device are improved in comparison with prior-art devices. The invention further relates to a method for fabricating such an integrated-circuit device.

摘要翻译： 本发明涉及一种在电介质层中具有至少一个含铜特征的集成电路器件，以及布置在特征和电介质层之间的扩散阻挡层堆叠。 本发明的集成电路器件具有扩散阻挡层堆叠，其包括在从含铜特征到电介质层的方向上具有CuSiN层和SiN层。 该层组合提供了用于抑制从特征进入电介质层的铜扩散的有效屏障。 此外，CuSiN / SiN层序列提供了扩散阻挡层堆叠层和电介质层之间的改进的粘合性，从而提高了集成电路器件在操作期间的电迁移性能。 因此，与现有技术的装置相比，提高了器件工作的可靠性和集成电路器件的寿命。 本发明还涉及一种用于制造这种集成电路器件的方法。

公开(公告)号：US20090273085A1

公开(公告)日：2009-11-05

申请号：US12439910

申请日：2007-08-29

申请人： Nicolas Jourdan ,  Laurant Georges Gosset ,  Joaquin Torres

发明人： Nicolas Jourdan ,  Laurant Georges Gosset ,  Joaquin Torres

IPC分类号： H01L23/532 ,  H01L21/768

CPC分类号： H01L21/76831 ,  H01L21/76846 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76867 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76886 ,  H01L23/53238 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： The present invention relates to an integrated-circuit device that has at least one Copper-containing feature in a dielectric layer, and a diffusion-barrier layer stack arranged between the feature and the dielectric layer. The integrated-circuit device of the invention has a diffusion-barrier layer stack, which comprises, in a direction from the Copper-containing feature to the dielectric layer, a CuSiN layer and a SiN layer. This layer combination provides an efficient barrier for suppressing Copper diffusion from the feature into the dielectric layer. Furthermore, a CuSiN/SiN layer sequence provides an improved adhesion between the layers of the diffusion-barrier layer stack and the dielectric layer, and thus improves the electromigration performance of the integrated-circuit device during operation. Therefore, the reliability of device operation and the lifetime of the integrate-circuit device are improved in comparison with prior-art devices. The invention further relates to a method for fabricating such an integrated-circuit device.

摘要翻译： 本发明涉及一种在电介质层中具有至少一个含铜特征的集成电路器件，以及布置在特征和电介质层之间的扩散阻挡层堆叠。 本发明的集成电路器件具有扩散阻挡层堆叠，其包括在从含铜特征到电介质层的方向上具有CuSiN层和SiN层。 该层组合提供了用于抑制从特征进入电介质层的铜扩散的有效屏障。 此外，CuSiN / SiN层序列提供了扩散阻挡层堆叠层和电介质层之间的改进的粘合性，从而提高了集成电路器件在操作期间的电迁移性能。 因此，与现有技术的装置相比，提高了器件工作的可靠性和集成电路器件的寿命。 本发明还涉及一种用于制造这种集成电路器件的方法。

公开(公告)号：US08729701B2

公开(公告)日：2014-05-20

申请号：US12882577

申请日：2010-09-15

申请人： Nicolas Jourdan ,  Joaquin Torres

发明人： Nicolas Jourdan ,  Joaquin Torres

IPC分类号： H01L23/532

CPC分类号： H01L21/76843 ,  H01L21/76831 ,  H01L21/76864 ,  H01L21/76868 ,  H01L21/76873 ,  H01L23/53238 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invention concerns a method of forming a copper portion surrounded by an insulating material in an integrated circuit structure, the insulating material being a first oxide, the method having steps including forming a composite material over a region of the insulating material where the copper portion is to be formed, the composite material having first and second materials, annealing such that the second material reacts with the insulating material to form a second oxide that provides a diffusion barrier to copper; and depositing a copper layer over the composite material by electrochemical deposition to form the copper portion.

摘要翻译： 本发明涉及一种形成由集成电路结构中的绝缘材料包围的铜部分的方法，绝缘材料是第一氧化物，该方法包括在绝缘材料的区域上形成复合材料，其中铜部分为 要形成的具有第一和第二材料的复合材料退火，使得第二材料与绝缘材料反应以形成向铜提供扩散阻挡层的第二氧化物; 以及通过电化学沉积在复合材料上沉积铜层以形成铜部分。

公开(公告)号：US07816266B2

公开(公告)日：2010-10-19

申请号：US11867708

申请日：2007-10-05

申请人： Nicolas Jourdan ,  Joaquin Torres

发明人： Nicolas Jourdan ,  Joaquin Torres

IPC分类号： H01L21/44 ,  H01L21/441

CPC分类号： H01L21/76843 ,  H01L21/76831 ,  H01L21/76864 ,  H01L21/76868 ,  H01L21/76873 ,  H01L23/53238 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invention concerns a method of forming a copper portion surrounded by an insulating material in an integrated circuit structure, the insulating material being a first oxide, the method having steps including forming a composite material over a region of the insulating material where the copper portion is to be formed, the composite material having first and second materials, annealing such that the second material reacts with the insulating material to form a second oxide that provides a diffusion barrier to copper; and depositing a copper layer over the composite material by electrochemical deposition to form the copper portion.

摘要翻译： 本发明涉及一种形成由集成电路结构中的绝缘材料围绕的铜部分的方法，绝缘材料是第一氧化物，该方法包括在铜部分为绝缘材料的区域上形成复合材料 要形成的具有第一和第二材料的复合材料退火，使得第二材料与绝缘材料反应以形成向铜提供扩散阻挡层的第二氧化物; 以及通过电化学沉积在复合材料上沉积铜层以形成铜部分。

公开(公告)号：US20080280151A1

公开(公告)日：2008-11-13

申请号：US11867708

申请日：2007-10-05

申请人： Nicolas Jourdan ,  Joaquin Torres

发明人： Nicolas Jourdan ,  Joaquin Torres

IPC分类号： H05K3/00 ,  B32B15/04

CPC分类号： H01L21/76843 ,  H01L21/76831 ,  H01L21/76864 ,  H01L21/76868 ,  H01L21/76873 ,  H01L23/53238 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invention concerns a method of forming a copper portion surrounded by an insulating material in an integrated circuit structure, the insulating material being a first oxide, the method having steps including forming a composite material over a region of the insulating material where the copper portion is to be formed, the composite material having first and second materials, annealing such that the second material reacts with the insulating material to form a second oxide that provides a diffusion barrier to copper; and depositing a copper layer over the composite material by electrochemical deposition to form the copper portion.

摘要翻译： 本发明涉及一种形成由集成电路结构中的绝缘材料围绕的铜部分的方法，绝缘材料是第一氧化物，该方法包括在铜部分为绝缘材料的区域上形成复合材料 要形成的具有第一和第二材料的复合材料退火，使得第二材料与绝缘材料反应以形成向铜提供扩散阻挡层的第二氧化物; 以及通过电化学沉积在复合材料上沉积铜层以形成铜部分。

公开(公告)号：US20110006430A1

公开(公告)日：2011-01-13

申请号：US12882577

申请日：2010-09-15

申请人： Nicolas Jourdan ,  Joaquin Torres

发明人： Nicolas Jourdan ,  Joaquin Torres

IPC分类号： H01L23/532

CPC分类号： H01L21/76843 ,  H01L21/76831 ,  H01L21/76864 ,  H01L21/76868 ,  H01L21/76873 ,  H01L23/53238 ,  H01L2221/1089 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invention concerns a method of forming a copper portion surrounded by an insulating material in an integrated circuit structure, the insulating material being a first oxide, the method having steps including forming a composite material over a region of the insulating material where the copper portion is to be formed, the composite material having first and second materials, annealing such that the second material reacts with the insulating material to form a second oxide that provides a diffusion barrier to copper; and depositing a copper layer over the composite material by electrochemical deposition to form the copper portion.

摘要翻译： 本发明涉及一种形成由集成电路结构中的绝缘材料包围的铜部分的方法，绝缘材料是第一氧化物，该方法包括在绝缘材料的区域上形成复合材料，其中铜部分为 要形成的具有第一和第二材料的复合材料退火，使得第二材料与绝缘材料反应以形成向铜提供扩散阻挡层的第二氧化物; 以及通过电化学沉积在复合材料上沉积铜层以形成铜部分。