CELL CULTURE DEVICE AND CELL CULTURE SYSTEM COMPRISING SAME

    公开(公告)号:US20250163354A1

    公开(公告)日:2025-05-22

    申请号:US18837988

    申请日:2022-07-21

    Abstract: The present invention may provide a cell culture device and a cell culture system comprising same, wherein the cell culture device comprises: a plurality of upper chambers provided with a porous membrane on the lower side thereof and first accommodation spaces thereinside; a lower chamber configured to provide a second accommodation spaces therein; and a support configured to prevent the plurality of upper chambers from coming into contact with the lower chamber and configured such that the plurality of upper chambers are spaced apart from each other in a horizontal direction by a predetermined distance, wherein the first accommodation spaces and the second accommodation spaces are configured to exchange materials with each other through the porous membrane, and the second accommodation spaces have a material exchange area common to each of the first accommodation spaces provided in the plurality of upper chambers.

    NEUROMORPHIC SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF

    公开(公告)号:US20250157556A1

    公开(公告)日:2025-05-15

    申请号:US18945134

    申请日:2024-11-12

    Abstract: The present disclosure relates to a neuromorphic semiconductor device and an operation method thereof, and a resistive processing unit used as a synaptic element includes a first N-type metal oxide semiconductor (NMOS) transistor electrically connected to a first input terminal, a second NMOS transistor electrically connected to a second input terminal and connected in series with the first NMOS transistor, and a read transistor connected to the second NMOS transistor and configured to store charge and read the amount of stored charge.

    DEVICE-BASED CROSS POINT ARRAY AND METHOD OF OPERATION THEREOF

    公开(公告)号:US20250140313A1

    公开(公告)日:2025-05-01

    申请号:US18758245

    申请日:2024-06-28

    Abstract: Disclosed a device-based cross point array and a method of operation therefor. The method relates to a method for updating a cross point array implemented as a device where a potentiation region and a depression region are separated, and the method is performed by a control logic. The method includes: in a first cycle, controlling lines where positive values are applied among first lines, in ON state, and applying a first voltage pulse at each of second lines intersecting with the first lines based on an applied value; and in a second cycle, controlling lines where negative values are applied among the first lines, in ON state, and applying a second voltage pulse at each of the second lines based on an applied value.

    MACHINE LEARNING-BASED SEMICONDUCTOR PROCESS OPTIMIZATION METHOD AND SYSTEM

    公开(公告)号:US20250139345A1

    公开(公告)日:2025-05-01

    申请号:US18814380

    申请日:2024-08-23

    Abstract: A machine-learning method for semiconductor process optimization may include inputting semiconductor-related parameters into each of first neural network models and outputting, based on the semiconductor-related parameters, a predicted figure of merit of a semiconductor device as a first output value from each of the first neural network models. After a semiconductor manufacturing process is performed with a semiconductor manufacturing parameter, electrical measurement parameter values may be measured using one or more measuring devices. The semiconductor-related parameters may include electrical measurement parameter values measured on one or more semiconductor devices. The method may also utilize a feedback loop between an output and an input of the first neural network models so that the electrical measurement parameter values can be updated based on an output value of the first neural network models. A second neural network model may also be used. A computing device and a system are also disclosed.

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