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    METHOD AND APPARATUS FOR OPTICALLY TRANSPARENT TRANSISTOR
    1.
    发明申请
    METHOD AND APPARATUS FOR OPTICALLY TRANSPARENT TRANSISTOR 审中-公开
    用于光学透明晶体管的方法和装置

    公开(公告)号：US20100163861A1

    公开(公告)日：2010-07-01

    申请号：US12344775

    申请日：2008-12-29

    申请人： Paul W. Brazis, JR.

    发明人： Paul W. Brazis, JR.

    IPC分类号： H01L29/12 ,  H01L21/033

    CPC分类号： H01L29/7869 ,  H01L29/45 ,  H01L29/4908

    摘要： A method and apparatus for an optically transparent field effect transistor on a substrate. The gate electrode, the dielectric, the semiconducting layer, the source electrode, and the drain electrode are optically transparent layers of nanoparticles that are formed using one or more graphic arts printing processes. The dielectric layer is in contact with the gate electrode, the semiconducting layer is in contact with the dielectric layer, and the source and drain electrodes are in contact with the semiconducting layer.

    摘要翻译： 一种用于衬底上的光学透明场效应晶体管的方法和装置。 栅电极，电介质，半导体层，源电极和漏电极是使用一个或多个图形印刷工艺形成的纳米颗粒的光学透明层。 电介质层与栅电极接触，半导电层与电介质层接触，源极和漏极与半导电层接触。

    Inverter circuit having a feedback switch and methods corresponding thereto
    2.
    发明授权
    Inverter circuit having a feedback switch and methods corresponding thereto 失效
    具有反馈开关的逆变器电路及其对应的方法

    公开(公告)号：US07550998B2

    公开(公告)日：2009-06-23

    申请号：US11259480

    申请日：2005-10-26

    申请人： Paul W. Brazis ,  Daniel R. Gamota ,  Kin P. Tsui ,  John B. Szczech ,  Jie Zhang

    发明人： Paul W. Brazis ,  Daniel R. Gamota ,  Kin P. Tsui ,  John B. Szczech ,  Jie Zhang

    IPC分类号： H03K19/094 ,  H03K19/0175 ,  H03K19/20

    CPC分类号： H03K19/01721 ,  H03K19/09441

    摘要： An inverter circuit (500) having a drive transistor (102) that operably couples to a voltage bias input (101) (and where that drive transistor controls the inverter circuit output by opening and closing a connection between the output (105) and ground (104)) is further operably coupled to a feedback switch (401). In a preferred approach the feedback switch is itself also operably coupled to the voltage bias input and the output and preferably serves, when the drive transistor is switched “off,” to responsively couple the voltage bias input to the drive transistor in such a way as to cause a gate terminal of the drive transistor to have its polarity relative to a source terminal of the drive transistor reversed and hence permit the inverter circuit to operate across a substantially full potential operating range of the drive transistor.

    摘要翻译： 一种具有可操作地耦合到电压偏置输入（101）的驱动晶体管（102）的逆变器电路（500），并且其中该驱动晶体管通过打开和关闭输出（105）和地（ 104））进一步可操作地耦合到反馈开关（401）。 在优选的方法中，反馈开关本身也可操作地耦合到电压偏置输入端和输出端，并且优选地在驱动晶体管被切断时关断，以将电压偏置输入以驱动晶体管的方式耦合到驱动晶体管， 以使驱动晶体管的栅极端子相对于驱动晶体管的源极端子的极性相反，从而允许逆变器电路在驱动晶体管的基本上全部的电位工作范围内工作。

    Electronic module interconnection apparatus
    3.
    发明授权
    Electronic module interconnection apparatus 失效
    电子模块互连设备

    公开(公告)号：US07492604B2

    公开(公告)日：2009-02-17

    申请号：US11379751

    申请日：2006-04-21

    申请人： Paul W. Brazis ,  Marc K. Chason ,  Daniel R. Gamota ,  Krishna Kalyanasundaram

    发明人： Paul W. Brazis ,  Marc K. Chason ,  Daniel R. Gamota ,  Krishna Kalyanasundaram

    IPC分类号： H05K1/11

    CPC分类号： H05K1/147 ,  H05K1/118 ,  H05K1/144 ,  H05K3/361 ,  H05K3/363 ,  H05K2201/041 ,  H05K2201/10189 ,  H05K2201/10674 ,  H05K2203/1572

    摘要： An electronic apparatus, includes a plurality of electronic modules, each having a maximum thickness of no more than 90 microns, each comprising a substrate having a two sided edge connection pattern. The electronic modules are arranged adjacent to each other. Each pad of a first set of connection pads on a first electronic module is conductively connected to an opposing pad of a second set of connection pads of a second electronic module. The first set of connection pads is separated from the second set of connection pads by electrically conductive material that is less than 15 microns thick.

    摘要翻译： 一种电子设备，包括多个电子模块，每个电子模块的最大厚度不超过90微米，每个电子模块包括具有双面边缘连接图案的基板。 电子模块彼此相邻布置。 第一电子模块上的第一组连接焊盘的每个焊盘导电地连接到第二电子模块的第二组连接焊盘的相对焊盘。 第一组连接焊盘通过小于15微米厚的导电材料与第二组连接焊盘分开。

    HIGH SPEED CONTROLLABLE LOAD
    4.
    发明申请
    HIGH SPEED CONTROLLABLE LOAD 有权
    高速可控负载

    公开(公告)号：US20120319709A1

    公开(公告)日：2012-12-20

    申请号：US13160710

    申请日：2011-06-15

    申请人： Paul W. Brazis, JR.

    发明人： Paul W. Brazis, JR.

    IPC分类号： G01R31/00

    CPC分类号： G01R31/3274 ,  G01R31/3272

    摘要： A high speed controllable load uses a voltage waveform synthesizer and a driver circuit to dynamically control an electronically variable load to generate a current though an arc fault circuit interrupter (AFCI) device under test. Sensors may be used to monitor a source voltage and the output current to generate an arbitrary waveform have a range of voltage and current phase shifts. An optical isolation circuit allows separation of grounds between a control stage and the AFCI device under test.

    摘要翻译： 高速可控负载使用电压波形合成器和驱动电路来动态地控制电子可变负载，以通过被测试的电弧故障电路断续器（AFCI）器件产生电流。 传感器可用于监测源电压，并且输出电流以产生任意波形，具有电压和电流相移的范围。 光隔离电路允许在控制级和被测试的AFCI器件之间分离接地。

    High speed controllable load
    5.
    发明授权
    High speed controllable load 有权
    高速可控负载

    公开(公告)号：US09551751B2

    公开(公告)日：2017-01-24

    申请号：US13160710

    申请日：2011-06-15

    申请人： Paul W. Brazis, Jr.

    发明人： Paul W. Brazis, Jr.

    IPC分类号： G01R31/00 ,  G01R31/327

    CPC分类号： G01R31/3274 ,  G01R31/3272

    摘要： A high speed controllable load uses a voltage waveform synthesizer and a driver circuit to dynamically control an electronically variable load to generate a current though an arc fault circuit interrupter (AFCI) device under test. Sensors may be used to monitor a source voltage and the output current to generate an arbitrary waveform have a range of voltage and current phase shifts. An optical isolation circuit allows separation of grounds between a control stage and the AFCI device under test.

    摘要翻译： 高速可控负载使用电压波形合成器和驱动电路来动态地控制电子可变负载，以通过被测试的电弧故障电路断续器（AFCI）器件产生电流。 传感器可用于监测源电压，并且输出电流以产生任意波形，具有电压和电流相移的范围。 光隔离电路允许在控制级和被测试的AFCI器件之间分离接地。

    Method of fabricating organic field effect transistors
    7.
    发明授权
    Method of fabricating organic field effect transistors 失效
    制造有机场效应晶体管的方法

    公开(公告)号：US07399656B2

    公开(公告)日：2008-07-15

    申请号：US11102166

    申请日：2005-04-08

    申请人： Jie Zhang ,  Paul W. Brazis ,  Daniel R. Gamota ,  Krishna Kalyanasundaram ,  Min-Xian M. Zhang

    发明人： Jie Zhang ,  Paul W. Brazis ,  Daniel R. Gamota ,  Krishna Kalyanasundaram ,  Min-Xian M. Zhang

    IPC分类号： H01L21/00

    CPC分类号： H01L51/0516 ,  H01L51/0024 ,  H01L51/0036 ,  H01L51/0051 ,  H01L51/0078 ,  H01L51/0084

    摘要： Organic field effect transistors (OFETs) can be created rapidly and at low cost on organic films by using a multilayer film (202) that has an electrically conducting layer (204, 206) on each side of a dielectric core. The electrically conducting layer is patterned to form gate electrodes (214), and a polymer film (223) is attached onto the gate electrode side of the multilayer dielectric film, using heat and pressure (225) or an adhesive layer (228). A source electrode and a drain electrode (236) are then fashioned on the remaining side of the multilayer dielectric film, and an organic semiconductor (247) is deposited over the source and drain electrodes, so as to fill the gap between the source and drain electrodes and touch a portion of the dielectric film to create an organic field effect transistor.

    摘要翻译： 有机场效应晶体管（OFET）可以通过使用在介质芯的每一侧上具有导电层（204,206）的多层膜（202）在有机膜上快速且低成本地产生。 图案化导电层以形成栅电极（214），并且使用热和压力（225）或粘合剂层（228）将聚合物膜（223）附着到多层电介质膜的栅电极侧。 然后在多层电介质膜的剩余侧上形成源电极和漏电极（236），并且在源电极和漏电极上沉积有机半导体（247），以填充源极和漏极之间的间隙 电极并且接触电介质膜的一部分以产生有机场效应晶体管。

    Organic semiconductor device having an oxide layer
    9.
    发明授权
    Organic semiconductor device having an oxide layer 有权
    具有氧化物层的有机半导体器件

    公开(公告)号：US06677607B2

    公开(公告)日：2004-01-13

    申请号：US10057367

    申请日：2002-01-25

    申请人： Steven M. Scheifers ,  Daniel R. Gamota ,  Paul W. Brazis, Jr. ,  Jie Zhang ,  Lawrence E. Lach

    发明人： Steven M. Scheifers ,  Daniel R. Gamota ,  Paul W. Brazis, Jr. ,  Jie Zhang ,  Lawrence E. Lach

    IPC分类号： H01L3524

    CPC分类号： H01L51/0545 ,  H01L21/31683 ,  H01L51/0021 ,  H01L51/0512

    摘要： A semiconductor device having a flexible or rigid substrate (11) having a gate electrode (21), a source electrode (61 and 101), and a drain electrode (62 and 102) formed thereon and organic semiconductor material (51, 81, and 91) disposed at least partially thereover. The gate electrode (21) has a thin dielectric layer 41 formed thereabout through oxidation. In many of the embodiments, any of the above elements can be formed through contact or non-contact printing. Sizing of the resultant device can be readily scaled to suit various needs.

    摘要翻译： 一种具有柔性或刚性基板（11）的半导体器件，具有栅电极（21），源电极（61,101）和形成在其上的漏极电极（62和102）和有机半导体材料（51,81和 91）至少部分地设置在其上。 栅电极（21）具有通过氧化形成在其周围的薄介电层41。 在许多实施例中，可以通过接触或非接触印刷形成任何上述元件。 可以容易地缩放所得到的装置的尺寸以适应各种需要。