摘要:
A method for dynamically reconfiguring control of a data bus when an initial device acting as a bus master fails or become inoperative. Each device connected to the data bus checks for the logical address of either its next higher or next lower neighbor; and the initial device acting as bus master is arbitrarily assigned the highest or lowest available logical address respectively. In either instance, the logically next lower or logically next higher device, respectively, may see a device at a logical address that is lower or higher than its own, thereby indicating that the initial device acting as bus master has become inoperative. Thereafter, the next available device able to act as bus master promotes itself to act as bus master, including reassigning itself to the highest or lowest available logical address, respectively.
摘要:
A method and apparatus are disclosed for automatically determining system configuration information, including the sector, carrier frequency and bus assignment of each hardware component installed on equipment, such as a cell station. In an illustrative cell station implementation, each cell station includes a hardware controller that communicates on a common bus with a plurality of hardware components. When each cell station is powered up or reset, each hardware component reads an identification value (or a portion thereof) that has some physical significance from a backplane on which the hardware component is installed. The identification information obtained from the backplane is used to derive a bus address that uniquely identifies each hardware component on the common bus. In addition, the identification information contains information that describes the hardware component and how the component is located within the cell station. In the illustrative embodiment, the identification value identifies the carrier frequency, frame, sector number (such as &agr;, &bgr;, &ggr;), unit type and unit number associated with the hardware component. The hardware component can provide information to the hardware controller that allows the hardware controller to generate a map of the hardware components located within the cell and determine their interconnection.