Reed-solomon decoder using a configurable arithmetic processor
    3.
    发明授权
    Reed-solomon decoder using a configurable arithmetic processor 有权
    Reed-solomon解码器使用可配置的算术处理器

    公开(公告)号:US07870468B1

    公开(公告)日:2011-01-11

    申请号:US11441596

    申请日:2006-05-26

    IPC分类号: H03M13/00

    摘要: A Reed Solomon decoder utilizes re-configurable and re-usable components in a granular configuration which provides an upper array and a lower array of repeated Reconfigurable Elementary Units (REU) which in conjunction with a FIFO can be loaded with syndromes and correction terms to decode Reed Solomon codewords. The upper array of REUs and lower array of REUs handle the Reed Solomon decoding steps in a pipelined manner using systolic REU structures. The repeated REU includes the two registers, two Galois Field adders, a Galois Field multiplier, and multiplexers to interconnect the elements. The REU is then able to perform each of the steps required for Reed-Solomon decoder through reconfiguration for each step using the multiplexers to reconfigure the functions. In this manner, a reconfigurable computational element may be used for each step of the Reed-Solomon decoding process.

    摘要翻译: Reed Solomon解码器采用粒度配置中的可重新配置和可重复使用的组件,其提供重复可重配置单元(REU)的上阵列和下阵列,其结合FIFO可以加载校正子和校正项来解码 里德所罗门码字。 REU的上排列和REU的较低阵列使用收缩式REU结构以流水线方式处理Reed Solomon解码步骤。 重复的REU包括两个寄存器,两个Galois Field加法器,Galois Field乘法器和用于互连元件的多路复用器。 然后,REU能够通过使用多路复用器重新配置功能的每个步骤通过重新配置来执行Reed-Solomon解码器所需的每个步骤。 以这种方式,可以对Reed-Solomon解码处理的每个步骤使用可重新配置的计算元件。