公开(公告)号：US08149965B2

公开(公告)日：2012-04-03

申请号：US12211337

申请日：2008-09-16

申请人： Dharani Naga Sailaja Sankabathula ,  Partha Sarathy Murali ,  Logeshwaran Vijayan ,  Nagaraja Reddy Anakala

发明人： Dharani Naga Sailaja Sankabathula ,  Partha Sarathy Murali ,  Logeshwaran Vijayan ,  Nagaraja Reddy Anakala

IPC分类号： H04L27/08 ,  H03K9/00

CPC分类号： H04L1/206 ,  H04L27/0006 ,  H04L27/2647

摘要： An packet detection controller accepts an input from an AGC controller which indicates the presence of an increased signal energy and also completion of an AGC process and generates an output to suspend the AGC process. The packet detection controller also receives a plurality of IQ receiver streams and forms a single stream for use by a packet detector, which is controllable by an SNR_MODE indicating whether the signal to noise ratio is above or below a particular threshold, and a PD_RESET signal indicating that no packet detection should occur. The controller also receives a PACKET_DET signal indicating that packet detection is completed. The packet detection controller examines the incoming receiver streams and suspends AGC process if a packet detect is generated, or suspends the packet detector if an AGC process is required.

摘要翻译： 分组检测控制器接受来自AGC控制器的输入，其指示增加的信号能量的存在以及AGC处理的完成，并且产生用于暂停AGC过程的输出。 分组检测控制器还接收多个IQ接收机流并且形成单个流以供分组检测器使用，该分组检测器可以由指示信噪比是高于还是低于特定阈值的SNR_MODE控制，以及表示PD_RESET信号的PD_RESET信号 不会发生数据包检测。 控制器还接收一个指示分组检测完成的PACKET_DET信号。 如果产生分组检测，分组检测控制器检查输入的接收机流并暂停AGC处理，或者如果需要AGC过程则暂停分组检测器。

公开(公告)号：US08090062B2

公开(公告)日：2012-01-03

申请号：US12211324

申请日：2008-09-16

申请人： Dharani Naga Sailaja Sankabathula ,  Partha Sarathy Murali ,  Logeshwaran Vijayan ,  Nagaraja Reddy Anakala

发明人： Dharani Naga Sailaja Sankabathula ,  Partha Sarathy Murali ,  Logeshwaran Vijayan ,  Nagaraja Reddy Anakala

IPC分类号： H04L27/08

CPC分类号： H03G3/3052 ,  H04L27/0006 ,  H04L27/2647

摘要： An packet detection controller accepts an input from an AGC controller which indicates the presence of an increased signal energy and also completion of an AGC process and generates an output to suspend the AGC process. The packet detection controller also receives a plurality of IQ receiver streams and forms a single stream for use by a packet detector, which is controllable by an SNR_MODE indicating whether the signal to noise ratio is above or below a particular threshold, and a PD_RESET signal indicating that no packet detection should occur. The controller also receives a PACKET_DET signal indicating that packet detection is completed. The packet detection controller examines the incoming receiver streams and suspends AGC process if a packet detect is generated, or suspends the packet detector if an AGC process is required.

摘要翻译： 分组检测控制器接受来自AGC控制器的输入，其指示增加的信号能量的存在以及AGC处理的完成，并且产生用于暂停AGC过程的输出。 分组检测控制器还接收多个IQ接收机流并且形成单个流以供分组检测器使用，该分组检测器可以由指示信噪比是高于还是低于特定阈值的SNR_MODE控制，以及表示PD_RESET信号的PD_RESET信号 不会发生数据包检测。 控制器还接收一个指示分组检测完成的PACKET_DET信号。 如果产生分组检测，分组检测控制器检查输入的接收机流并暂停AGC处理，或者如果需要AGC过程则暂停分组检测器。

公开(公告)号：US20100027693A1

公开(公告)日：2010-02-04

申请号：US12185733

申请日：2008-08-04

申请人： Logeshwaran VIJAYAN ,  Sundaram VANKA ,  Partha Sarathy MURALI ,  Phanimithra GANGALAKURTHI

发明人： Logeshwaran VIJAYAN ,  Sundaram VANKA ,  Partha Sarathy MURALI ,  Phanimithra GANGALAKURTHI

IPC分类号： H03D1/04 ,  H04L27/00

CPC分类号： H04L5/0007 ,  H04L25/0204 ,  H04L25/0246 ,  H04L25/03178 ,  H04L25/0328 ,  H04L25/03292

摘要： A process for equalizing streams of OFDM subcarrier data computes the noise variance for each stream, and forms a stream weighting coefficient by equalizing the noise variance, such that for a first stream having a noise variance σ1 and a second stream having a noise variance of σ2, the first stream is scaled by k 1 = 2  σ 2 σ 1 2 + σ 2 2 and the second stream is scaled by k 2 = 2  σ 1 σ 1 2 + σ 2 2 .

摘要翻译： 用于均衡OFDM子载波数据流的过程计算每个流的噪声方差，并且通过均衡噪声方差形成流加权系数，使得对于具有噪声方差σ1的第一流和具有sigma2的噪声方差的第二流 ，第一个流由k 1 =2σsigma 2 sigma 2 2 + sigma 2 2缩放，第二个流由k 2 = 2 sigma 1 sigma 1 2 + sigma 2 2缩放。

公开(公告)号：US08090035B2

公开(公告)日：2012-01-03

申请号：US12211301

申请日：2008-09-16

申请人： Dharani Naga Sailaja Sankabathula ,  Partha Sarathy Murali ,  Logeshwaran Vijayan ,  Nagaraja Reddy Anakala

发明人： Dharani Naga Sailaja Sankabathula ,  Partha Sarathy Murali ,  Logeshwaran Vijayan ,  Nagaraja Reddy Anakala

IPC分类号： H04K1/10 ,  H04L27/28

CPC分类号： H03G3/3052 ,  H04L27/0006 ,  H04L27/2647

摘要： An packet detection controller accepts an input from an AGC controller which indicates the presence of an increased signal energy and also completion of an AGC process and generates an output to suspend the AGC process. The packet detection controller also receives a plurality of IQ receiver streams and forms a single stream for use by a packet detector, which is controllable by an SNR_MODE indicating whether the signal to noise ratio is above or below a particular threshold, and a PD_RESET signal indicating that no packet detection should occur. The controller also receives a PACKET_DET signal indicating that packet detection is completed. The packet detection controller examines the incoming receiver streams and suspends AGC process if a packet detect is generated, or suspends the packet detector if an AGC process is required.

摘要翻译： 分组检测控制器接受来自AGC控制器的输入，其指示增加的信号能量的存在以及AGC处理的完成，并且产生用于暂停AGC过程的输出。 分组检测控制器还接收多个IQ接收机流并且形成单个流以供分组检测器使用，该分组检测器可以由指示信噪比是高于还是低于特定阈值的SNR_MODE控制，以及表示PD_RESET信号的PD_RESET信号 不会发生数据包检测。 控制器还接收一个指示分组检测完成的PACKET_DET信号。 如果产生分组检测，分组检测控制器检查输入的接收机流并暂停AGC处理，或者如果需要AGC过程则暂停分组检测器。

公开(公告)号：US08031762B2

公开(公告)日：2011-10-04

申请号：US12185741

申请日：2008-08-04

申请人： Logeshwaran Vijayan ,  Sundaram Vanka ,  Partha Sarathy Murali ,  Phanimithra Gangalakurthi

发明人： Logeshwaran Vijayan ,  Sundaram Vanka ,  Partha Sarathy Murali ,  Phanimithra Gangalakurthi

IPC分类号： H03H7/30

CPC分类号： H04L25/0204 ,  H04L25/0246 ,  H04L27/2647 ,  H04L27/38 ,  H04L2025/03426

摘要： A process for equalizing streams of OFDM subcarrier data computes the noise variance for each stream, and forms a stream weighting coefficient by equalizing the noise variance, such that for a first stream having a noise variance σ1 and a second stream having a noise variance of σ2, the first stream is scaled by k 1 = 2 ⁢ σ 2 σ 1 2 + σ 2 2 and the second stream is scaled by k 2 = 2 ⁢ σ 1 σ 1 2 - σ 2 2 .

摘要翻译： 用于均衡OFDM子载波数据流的过程计算每个流的噪声方差，并且通过均衡噪声方差形成流加权系数，使得对于具有噪声方差的第一流和具有噪声方差的第二流 ＆sgr; 2，第一个流被缩放k 1 = 2＆sgr; 2＆sgr 1 2 +＆sgr 2 2，第二个流被k 2 = 2＆sgr; 1＆sgr 1 2 - ＆sgr 2 2。

公开(公告)号：US20100027702A1

公开(公告)日：2010-02-04

申请号：US12185741

申请日：2008-08-04

申请人： Logeshwaran Vijayan ,  Sundaram Vanka ,  Partha Sarathy Murali ,  Phanimithra Gangalakurthi

发明人： Logeshwaran Vijayan ,  Sundaram Vanka ,  Partha Sarathy Murali ,  Phanimithra Gangalakurthi

IPC分类号： H04B7/02

CPC分类号： H04L25/0204 ,  H04L25/0246 ,  H04L27/2647 ,  H04L27/38 ,  H04L2025/03426

摘要： A process for equalizing streams of OFDM subcarrier data computes the noise variance for each stream, and forms a stream weighting coefficient by equalizing the noise variance, such that for a first stream having a noise variance σ1 and a second stream having a noise variance of σ2, the first stream is scaled by k 1 = 2  σ 2 σ 1 2 + σ 2 2 and the second stream is scaled by k 2 = 2  σ 1 σ 1 2 - σ 2 2 .

摘要翻译： 用于均衡OFDM子载波数据流的过程计算每个流的噪声方差，并且通过均衡噪声方差形成流加权系数，使得对于具有噪声方差σ1的第一流和具有sigma2的噪声方差的第二流 ，第一个流由k 1 = 2西格玛2西格玛2 2西格玛2 2缩放，第二个流由k 2 = 2西格玛1西格玛2 2缩放。

公开(公告)号：US08971210B1

公开(公告)日：2015-03-03

申请号：US13114009

申请日：2011-05-23

申请人： Partha Sarathy Murali ,  Logeshwaran Vijayan

发明人： Partha Sarathy Murali ,  Logeshwaran Vijayan

IPC分类号： H04L12/28 ,  H04B10/10 ,  H04W84/12 ,  H04B7/04 ,  H04L7/04

CPC分类号： H04W84/12 ,  H04B7/0413 ,  H04B7/0689 ,  H04L7/042 ,  H04L25/03159 ,  H04L2025/03414 ,  H04L2025/03426

摘要： A configurable network adapter has N analog front ends, each generating a receiver output and a transmitter input. In a first mode of operation, the analog front end receiver outputs are coupled to a MIMO equalizer, which is coupled to an outer receiver and to a first MAC input, with the first MAC having an output coupled to an outer transmitter, a MIMO modulator, and to the analog front end transmitter inputs. In a second mode of operation, one or more of the analog front ends is directed to a SISO modulator fed by a second outer transmitter coupled to a second MAC transmitter output. An associated one or more of the analog front end receivers is coupled to a SISO equalizer, and thereafter to an outer receiver and to the second lower MAC, thereby providing a first mode for a single MIMO adapter and a second mode for a MIMO plus independent PAN interface.

摘要翻译： 可配置的网络适配器具有N个模拟前端，每个产生一个接收器输出和一个发射机输入。 在第一操作模式中，模拟前端接收器输出耦合到MIMO均衡器，其耦合到外接收器和第一MAC输入，第一MAC具有耦合到外发射器的输出，MIMO调制器 ，以及模拟前端变送器输入。 在第二操作模式中，模拟前端中的一个或多个被引导到由耦合到第二MAC发射器输出的第二外部发射器馈送的SISO调制器。 相关联的一个或多个模拟前端接收器耦合到SISO均衡器，然后耦合到外部接收器和第二较低MAC，从而为单个MIMO适配器提供第一模式，并且为MIMO加上独立的MIMO适配器提供第二模式 PAN接口。

公开(公告)号：US07965782B1

公开(公告)日：2011-06-21

申请号：US11801786

申请日：2007-05-11

申请人： Logeshwaran Vijayan ,  Partha Sarathy Murali ,  Sundaram Vanka

发明人： Logeshwaran Vijayan ,  Partha Sarathy Murali ,  Sundaram Vanka

IPC分类号： H04L5/12

CPC分类号： H04L25/0204 ,  H04L25/0246 ,  H04L25/03006 ,  H04L25/067 ,  H04L2025/03426

摘要： A reduced complexity maximum likelihood decoder receives a stream of symbols Y and channel estimate H. A transformation converts Y and H into Z and R by computing matrix R, such that the product of R and Q produces matrix H. A second transformation column-swaps matrix H to form H′, thereafter generating Q′ and R′ subject to the same constraints as was described for Q and R. Transformed variables Z and Z′ are formed by multiplying Y by QH and Q′H, respectively. Table entries with Z and R and Z′ and R′ have entries of all possible x2 accompanied by estimates of x1 derived from x2 and Z, and similar entries of all possible x1 accompanied by estimates of x2 derived from x1 and Z′. Hard and soft decisions are made by finding the minimum distance metric of the combined entries of the first and second table.

摘要翻译： 降低的复杂度最大似然解码器接收码流Y和信道估计H.变换通过计算矩阵R将Y和H转换成Z和R，使得R和Q的乘积产生矩阵H.第二变换列交换 矩阵H形成H'，之后产生与对Q和R所述相同约束的Q'和R'。变换的变量Z和Z'分别通过将Y乘以QH和Q'H来形成。 具有Z和R以及Z'和R'的表条目具有所有可能的x2的条目，伴随着从x2和Z导出的x1的估计，以及所有可能的x1的类似条目，伴随着从x1和Z'得到的x2的估计。 通过找到第一和第二表的组合条目的最小距离度量来进行硬和软判决。

公开(公告)号：US20100067625A1

公开(公告)日：2010-03-18

申请号：US12211337

申请日：2008-09-16

申请人： Dharani Naga Sailaja SANKABATHULA ,  Partha Sarathy Murali ,  Logeshwaran Vijayan ,  Nagaraja Reddy Anakala

发明人： Dharani Naga Sailaja SANKABATHULA ,  Partha Sarathy Murali ,  Logeshwaran Vijayan ,  Nagaraja Reddy Anakala

IPC分类号： H04L27/08

CPC分类号： H04L1/206 ,  H04L27/0006 ,  H04L27/2647

摘要： An packet detection controller accepts an input from an AGC controller which indicates the presence of an increased signal energy and also completion of an AGC process and generates an output to suspend the AGC process. The packet detection controller also receives a plurality of IQ receiver streams and forms a single stream for use by a packet detector, which is controllable by an SNR_MODE indicating whether the signal to noise ratio is above or below a particular threshold, and a PD_RESET signal indicating that no packet detection should occur. The controller also receives a PACKET_DET signal indicating that packet detection is completed. The packet detection controller examines the incoming receiver streams and suspends AGC process if a packet detect is generated, or suspends the packet detector if an AGC process is required.

摘要翻译： 分组检测控制器接受来自AGC控制器的输入，其指示增加的信号能量的存在以及AGC处理的完成，并且产生用于暂停AGC过程的输出。 分组检测控制器还接收多个IQ接收机流并且形成单个流以供分组检测器使用，该分组检测器可以由指示信噪比是高于还是低于特定阈值的SNR_MODE控制，以及表示PD_RESET信号的PD_RESET信号 不会发生数据包检测。 控制器还接收一个指示分组检测完成的PACKET_DET信号。 如果产生分组检测，分组检测控制器检查输入的接收机流并暂停AGC处理，或者如果需要AGC过程则暂停分组检测器。

公开(公告)号：US20100067623A1

公开(公告)日：2010-03-18

申请号：US12211301

申请日：2008-09-16

申请人： Dharani Naga Sailaja SANKABATHULA ,  Partha Sarathy Murali ,  Logeshwaran Vijayan ,  Nagaraja Reddy Anakala

发明人： Dharani Naga Sailaja SANKABATHULA ,  Partha Sarathy Murali ,  Logeshwaran Vijayan ,  Nagaraja Reddy Anakala

IPC分类号： H04L27/08

CPC分类号： H03G3/3052 ,  H04L27/0006 ,  H04L27/2647

摘要： An packet detection controller accepts an input from an AGC controller which indicates the presence of an increased signal energy and also completion of an AGC process and generates an output to suspend the AGC process. The packet detection controller also receives a plurality of IQ receiver streams and forms a single stream for use by a packet detector, which is controllable by an SNR_MODE indicating whether the signal to noise ratio is above or below a particular threshold, and a PD_RESET signal indicating that no packet detection should occur. The controller also receives a PACKET_DET signal indicating that packet detection is completed. The packet detection controller examines the incoming receiver streams and suspends AGC process if a packet detect is generated, or suspends the packet detector if an AGC process is required.

摘要翻译： 分组检测控制器接受来自AGC控制器的输入，其指示增加的信号能量的存在以及AGC处理的完成，并且产生用于暂停AGC过程的输出。 分组检测控制器还接收多个IQ接收机流并且形成单个流以供分组检测器使用，该分组检测器可以由指示信噪比是高于还是低于特定阈值的SNR_MODE控制，以及表示PD_RESET信号的PD_RESET信号 不会发生数据包检测。 控制器还接收一个指示分组检测完成的PACKET_DET信号。 如果产生分组检测，分组检测控制器检查输入的接收机流并暂停AGC处理，或者如果需要AGC过程则暂停分组检测器。