公开(公告)号：US5170318A

公开(公告)日：1992-12-08

申请号：US783490

申请日：1991-10-28

申请人： Gilles Catala ,  Casimir Lasmayoux ,  Michel Ferry ,  Pierre Vachee ,  Andre Paci ,  Henri Braquet

发明人： Gilles Catala ,  Casimir Lasmayoux ,  Michel Ferry ,  Pierre Vachee ,  Andre Paci ,  Henri Braquet

IPC分类号： H01G4/14 ,  H01G4/35

CPC分类号： H01G4/35 ,  H01G4/14

摘要： A flexible capacitor (1) includes a dielectric made of flexible material, coated on each side with conductive material for insertion between a cable shield being at the ground potential of a remote electrical machine, and a part on a local machine being at the local ground potential (3, 5, 2) for example at a connector (7) level.

摘要翻译： 柔性电容器（1）包括由柔性材料制成的电介质，每侧涂覆导电材料，用于插入位于远程电机的地电位的电缆屏蔽之间，以及位于本地的本地机器上的部分 电位（3,5,2），例如在连接器（7）电平。

公开(公告)号：US4283789A

公开(公告)日：1981-08-11

申请号：US70549

申请日：1979-08-29

申请人： Jean L. Monrolin ,  Pierre Vachee

发明人： Jean L. Monrolin ,  Pierre Vachee

IPC分类号： H03M5/16 ,  H04J9/00 ,  H04J99/00 ,  H04L5/02 ,  H04L25/30 ,  H04L25/49 ,  H04B1/20 ,  H03K13/00 ,  H04N3/00

CPC分类号： H04L25/4923 ,  H04L5/02

摘要： Binary/ternary transmission process and device. Several trains of binary signals are time-multiplexed by using registers RG1 and SER to generate a first binary sequence L applied to an ENCODE unit which also receives a second binary sequence D and clock information CP. When the information of sequence L is at one binary level, the resulting signal is coded in bipolar code. When the information of sequence L is the other binary level, the resulting signal is coded in biphase code.

摘要翻译： 二进制/三进制传输过程和设备。 通过使用寄存器RG1和SER对多个二进制信号的列进行时间复用，以产生应用于也接收第二二进制序列D和时钟信息CP的ENCODE单元的第一二进制序列L. 当序列L的信息处于一个二进制电平时，所得到的信号以双极码编码。 当序列L的信息是另一个二进制电平时，所得到的信号被编码为双相代码。

公开(公告)号：US5299087A

公开(公告)日：1994-03-29

申请号：US731593

申请日：1991-07-17

申请人： Yvan Fermier ,  Michel Ferry ,  Christian Jacquart ,  Pierre Vachee

发明人： Yvan Fermier ,  Michel Ferry ,  Christian Jacquart ,  Pierre Vachee

IPC分类号： G06F1/30 ,  H02H3/08 ,  H02H3/087 ,  H02J13/00 ,  H02H3/093

CPC分类号： H02H3/087 ,  H03F2200/426

摘要： The overload protection circuit 12 comprises a resistor bridge 20 with a low impedance sensing resistor r and high impedance resistors R1 to R4 which generates voltages Va and Vb at the inputs 32 and 34 of a comparator 22. Voltage Vb depend upon the value of the load current so that the comparator provides at its output 36 a control signal for opening the switching device 24 comprising a field effect transistor when the load current exceeds a maximum value. Resistor R5 reinforces the effect of the control signal. This circuit can be used in a system which comprises a central power supply unit 8 which powers a plurality of devices such as 4. The status of the circuit 12 is reported to the system 8 though line 14 and circuit 12 comprises a control circuit 26 which is responsive to set and reset control signals on lines 14 and 18 from the unit 8 to close or open the switch 26.

摘要翻译： 过载保护电路12包括具有低阻抗感测电阻器r的电阻器桥20和在比较器22的输入端32和34处产生电压Va和Vb的高阻抗电阻器R1至R4。电压Vb取决于负载的值 使得比较器在其输出端36提供用于在负载电流超过最大值时打开包括场效应晶体管的开关器件24的控制信号。 电阻R5加强了控制信号的影响。 该电路可以用于包括对多个设备（例如4）供电的中央电源单元8的系统中。电路12的状态通过线路14被报告给系统8，电路12包括控制电路26，控制电路26 响应于来自单元8的线路14和18上的设置和复位控制信号以关闭或打开开关26。

公开(公告)号：US5191323A

公开(公告)日：1993-03-02

申请号：US681611

申请日：1991-03-25

申请人： Gilles Abbes ,  Eric Lamboley ,  Thierry Roman ,  Pierre Vachee

发明人： Gilles Abbes ,  Eric Lamboley ,  Thierry Roman ,  Pierre Vachee

IPC分类号： G06F1/00 ,  G06F21/00 ,  H04L12/12

CPC分类号： H04L12/12 ,  G06F21/305 ,  G06F21/81 ,  G06F21/83 ,  Y02B60/34 ,  Y04S40/24

摘要： The remote power On devices used for powering a system from a remote console, to restart the system after a power failure. The remote console is connected to the system through switched network and autoanswer modem. When the connection is established the ring indicator signal of the modem interface is provided to the power control system controlling the power distribution in system. In response to this signal, the system service processor is powered on so that it is able to send messages to console inviting an operator to enter a password authorizing the general power on of the system. The password entered by the operator is sent to processor, checked and if it is correct the general power on of the system occurs. If not, the function is cancelled. In addition, the function may be inhibited at the remote system. This insures that the remote powering function is performed safely.

摘要翻译： 远程开机设备用于从远程控制台为系统供电，在断电后重新启动系统。 远程控制台通过交换网络和自动调制解调器连接到系统。 当连接建立时，调制解调器接口的振铃指示信号提供给控制系统配电的电源控制系统。 响应于该信号，系统服务处理器通电，使得能够向控制台发送消息，邀请操作者输入授权系统的通用电源的密码。 操作员输入的密码被发送到处理器，检查是否正确，系统发生一般电源。 否则，该功能被取消。 另外，远程系统可能会禁止该功能。 这确保远程供电功能安全执行。

公开(公告)号：US5119376A

公开(公告)日：1992-06-02

申请号：US506035

申请日：1990-04-06

申请人： Mohamed Badaoui ,  Jean Calvignac ,  Guy Carle ,  Christian Garcia ,  Pierre Vachee

发明人： Mohamed Badaoui ,  Jean Calvignac ,  Guy Carle ,  Christian Garcia ,  Pierre Vachee

IPC分类号： H04L29/10 ,  G06F13/38

CPC分类号： G06F13/385

摘要： Interconnection system for attaching a maximum number n of equipment users EU (DCE or DTE) to the line adapter (2) of a communication processing unit. The user data and control bits are carried on transmit and receive serial link 4 and 6 in data and control slot entities arranged in frame of period T, comprising one entity per user. These entities are allocated to the user equipments through multiplexing/demultiplexing circuit (10), link adapters (12-1) to (12-8) and connecting boxes (30-1) to (30-8). The user equipments are connected through active remote modules which are specific to the standardized interfaces of the user equipments. Link adapters (12-1) to (12-8) add to the data and control slot entities an outband slot which is used for exchanging control information, such as the active remote module address and type which are stored in memory (42), to be transmitted to the line adapter (2). The advantage of the interconnection system is that the attachment of the user equipments is simplified.

摘要翻译： 用于将最多数量的设备用户EU（DCE或DTE）附加到通信处理单元的线路适配器（2）的互连系统。 用户数据和控制位在周期T的帧中布置的数据和控制时隙实体中的发送和接收串行链路4和6上承载，每个用户包括一个实体。 这些实体通过复用/解复用电路（10），链路适配器（12-1）至（12-8）和连接盒（30-1）至（30-8）分配给用户设备。 用户设备通过用户设备标准接口专用的主动远程模块连接。 链路适配器（12-1）至（12-8）向数据和控制时隙实体添加用于交换诸如存储在存储器（42）中的主动远程模块地址和类型的控制信息的外带时隙， 被传送到线路适配器（2）。 互连系统的优点是简化了用户设备的连接。

公开(公告)号：US5237572A

公开(公告)日：1993-08-17

申请号：US830128

申请日：1992-01-31

申请人： Mohamed Badaoui ,  Jean Calvignac ,  Guy Carle ,  Christian Garcia ,  Pierre Vachee

发明人： Mohamed Badaoui ,  Jean Calvignac ,  Guy Carle ,  Christian Garcia ,  Pierre Vachee

IPC分类号： G06F13/38

CPC分类号： G06F13/385

摘要： An Active Remote Module (ARM) attaches end user devices to any port of a multiport communications processing unit. The ARM includes circuit arrangements which receive serial streams of data and clock information which are arranged into data slots, control slots and outband slot carrying characteristic information, including ARM address, ARM type, end user data rate, etc., about the ARM and the end user devices. By issuing selective commands, a line adapter in the multiport communications processing unit is made aware of the user devices connected to its port and structure the data to meet the requirement of the attached end user devices.

摘要翻译： 主动远程模块（ARM）将终端用户设备连接到多端口通信处理单元的任何端口。 ARM包括电路布置，其接收串行数据流和时钟信息，这些数据和时钟信息被布置成关于ARM和ARM的数据时隙，控制时隙和携带特征信息的带外特征信息，包括ARM地址，ARM类型，最终用户数据速率等 最终用户设备。 通过发出选择性命令，使多端口通信处理单元中的线路适配器知道连接到其端口的用户设备并且构造数据以满足所附连接的终端用户设备的要求。

公开(公告)号：US4367549A

公开(公告)日：1983-01-04

申请号：US233805

申请日：1981-02-12

申请人： Pierre Vachee

发明人： Pierre Vachee

IPC分类号： H04J3/00 ,  H04J3/12 ,  H04L5/22

CPC分类号： H04L5/22 ,  H04J3/12

摘要： A time-division multiplexing method and device are disclosed for combining a data signal and several secondary binary signals into a train of pulses, whereby data signals can be transmitted at various bit rates in synchronous or asynchronous mode. The data signal and N secondary signals are multiplexed together using two different frames respectively termed "synchronous frame" and "asynchronous frame," depending on whether data transmission is to be performed in synchronous or asynchronous mode. The asynchronous frame comprises a frame-alignment bit having a predetermined value, a data bit, and N bits pertaining respectively to the N secondary signals. The synchronous frame is divided up into n subframes, l.sub.1 bits in length each, where n is equal to the integer that is immediately larger than the quantity N/(l.sub.1 -2). Length l.sub.1 is defined by the relation l.sub.1 =LR/DR, where LR is the fixed bit rate for the pulse train resulting from the multiplexing process and DR is the bit rate for the data signal. Each subframe includes a synchronization bit whose value is complementary to that of the frame alignment bit, a data bit, and several bits pertaining respectively to the secondary signals. In addition, the last subframe includes a frame-alignment bit. Each bit within a synchronous or an asynchronous frame is associated with a control bit which has a first predetermined value when it is associated with a synchronization bit or a frame-alignment bit, and the complementary value when it is associated with a data bit or with a bit pertaining to the secondary signals. All of the frame bits together with the associated control bits are then encoded to be simultaneously transmitted over the transmission path. The frame bits define a data channel designated A, and the control bits define another channel designated B. The bits are paired off, with each pair comprising a channel A bit and the channel B bit associated therewith, and each of these pairs is encoded for transmission over the line. The invention also provides the demultiplexing method associated with the multiplexing method. The invention further provides an interface tansmitter and an interface receiver embodying the methods described above and allowing various DTE to exchange data, control and timing signals.