公开(公告)号：US09369313B1

公开(公告)日：2016-06-14

申请号：US14634896

申请日：2015-03-02

Applicant: Po Shing Yu

Inventor： Po Shing Yu

IPC: H03H7/30 ,  H04L25/03 ,  H03F1/02 ,  H03F3/45

CPC classification number: H04L25/03057 ,  H03F1/0205 ,  H03F3/45183 ,  H03F2203/45112 ,  H03F2203/45702

Abstract: The present invention discloses pre-amplifier with a selectable threshold voltage in a decision feedback equalization circuit to reduce tap weight variation. A decision feedback equalization circuit includes a summer circuit and a pre-amplifier with an offset generator, wherein the pre-amplifier includes a pair of differential amplifiers and each biased by a respective current bias and each having first and second output nodes coupled to a supply voltage via a respective resistive element, R. The resistive elements may be implemented, for example, using diode-configured transistors, biased transistors, resistor, or any other active or passive circuitry for establishing a resistance. The inputs of first differential amplifier are coupled to the summer's output. The inputs of second differential amplifier are coupled to a reference voltage circuit that comprised of a resistive element and a respective current DAC (IDAC).

Abstract translation: 本发明公开了一种在判决反馈均衡电路中具有可选阈值电压的前置放大器，以减小抽头重量变化。 判决反馈均衡电路包括加法电路和具有偏移发生器的前置放大器，其中所述前置放大器包括一对差分放大器，并且每一个由相应的电流偏置偏置，并且每一个具有耦合到电源的第一和第二输出节点 电阻元件可以例如使用二极管配置的晶体管，偏置晶体管，电阻器或用于建立电阻的任何其它有源或无源电路来实现。 第一个差分放大器的输入端与夏天的输出端相连。 第二差分放大器的输入耦合到由电阻元件和相应的电流DAC（IDAC）组成的参考电压电路。

公开(公告)号：US08405377B2

公开(公告)日：2013-03-26

申请号：US12577396

申请日：2009-10-12

Applicant: Po-Shing Yu ,  Chia-Hsiang Chan

Inventor： Po-Shing Yu ,  Chia-Hsiang Chan

IPC: G05F3/16 ,  G05F3/20

CPC classification number: G05F3/262

Abstract: A programmable current mirror a reference transistor, first and second mirror transistors, and a first current bypass. The reference transistor has a source and a gate coupled to a reference current node. The first and second mirror transistors are coupled together in series at a first node. Each of the first and second mirror transistors having gates coupled to each other and to the gate of the reference transistor. The first current bypass including a switch disposed in parallel with the second mirror transistor. The first current bypass is coupled to a source and a drain of the second mirror transistor and to the first node.

Abstract translation: 可编程电流镜，参考晶体管，第一和第二反射镜晶体管，以及第一电流旁路。 参考晶体管具有耦合到参考电流节点的源极和栅极。 第一和第二反射镜晶体管在第一节点处串联在一起。 第一和第二反射镜晶体管中的每一个具有彼此耦合并且与参考晶体管的栅极耦合的栅极。 第一电流旁路包括与第二反射镜晶体管并联设置的开关。 第一电流旁路耦合到第二反射镜晶体管的源极和漏极以及第一节点。

公开(公告)号：US20110084682A1

公开(公告)日：2011-04-14

申请号：US12577396

申请日：2009-10-12

Applicant: Po-Shing YU ,  Chia-Hsiang CHANG

Inventor： Po-Shing YU ,  Chia-Hsiang CHANG

IPC: G05F3/16

CPC classification number: G05F3/262

Abstract: A programmable current mirror a reference transistor, first and second mirror transistors, and a first current bypass. The reference transistor has a source and a gate coupled to a reference current node. The first and second mirror transistors are coupled together in series at a first node. Each of the first and second mirror transistors having gates coupled to each other and to the gate of the reference transistor. The first current bypass including a switch disposed in parallel with the second mirror transistor. The first current bypass is coupled to a source and a drain of the second mirror transistor and to the first node.

Abstract translation: 可编程电流镜，参考晶体管，第一和第二反射镜晶体管，以及第一电流旁路。 参考晶体管具有耦合到参考电流节点的源极和栅极。 第一和第二反射镜晶体管在第一节点处串联在一起。 第一和第二反射镜晶体管中的每一个具有彼此耦合并且与参考晶体管的栅极耦合的栅极。 第一电流旁路包括与第二反射镜晶体管并联设置的开关。 第一电流旁路耦合到第二反射镜晶体管的源极和漏极以及第一节点。