公开(公告)号：US07612585B2

公开(公告)日：2009-11-03

申请号：US11654445

申请日：2007-01-17

申请人： Pulkit Shah ,  Prasad Kotra

发明人： Pulkit Shah ,  Prasad Kotra

IPC分类号： H03K19/094

CPC分类号： H03K5/08

摘要： An input buffer has a high voltage leg in parallel with a low voltage leg. The low voltage leg pulls up the pad when the pad voltage is below the power supply voltage. The high voltage leg remains off when the pad voltage is below the power supply. The low voltage leg is turned off when the pad voltage is above the power supply voltage. The high voltage leg is on when the pad voltage is above power supply voltage. A low voltage bias circuit and a high voltage bias circuit protect the transistors in the low and voltage legs when the pad voltage is above the power supply voltage. As a result, the pull-up circuit is high voltage tolerant and does not sink the current from pad.

摘要翻译： 输入缓冲器具有与低电压脚并联的高电压脚。 当焊盘电压低于电源电压时，低压脚拉起焊盘。 当焊盘电压低于电源时，高压脚保持关闭。 当焊盘电压高于电源电压时，低压脚断开。 当焊盘电压高于电源电压时，高压端子接通。 当焊盘电压高于电源电压时，低压偏置电路和高压偏置电路保护低压和低压端的晶体管。 因此，上拉电路具有高耐压性，并且不会从焊盘吸收电流。

公开(公告)号：US20070164804A1

公开(公告)日：2007-07-19

申请号：US11654445

申请日：2007-01-17

申请人： Pulkit Shah ,  Prasad Kotra

发明人： Pulkit Shah ,  Prasad Kotra

IPC分类号： H03K5/08

CPC分类号： H03K5/08

摘要： An input buffer has a high voltage leg in parallel with a low voltage leg. The low voltage leg pulls up the pad when the pad voltage is below the power supply voltage. The high voltage leg remains off when the pad voltage is below the power supply. The low voltage leg is turned off when the pad voltage is above the power supply voltage. The high voltage leg is on when the pad voltage is above power supply voltage. A low voltage bias circuit and a high voltage bias circuit protect the transistors in the low and voltage legs when the pad voltage is above the power supply voltage. As a result, the pull-up circuit is high voltage tolerant and does not sink the current from pad.

摘要翻译： 输入缓冲器具有与低电压脚并联的高电压脚。 当焊盘电压低于电源电压时，低压脚拉起焊盘。 当焊盘电压低于电源时，高压脚保持关闭。 当焊盘电压高于电源电压时，低压脚断开。 当焊盘电压高于电源电压时，高压端子接通。 当焊盘电压高于电源电压时，低压偏置电路和高压偏置电路保护低压和低压端的晶体管。 因此，上拉电路具有高耐压性，并且不会从焊盘吸收电流。

公开(公告)号：US07221200B1

公开(公告)日：2007-05-22

申请号：US11075632

申请日：2005-03-08

申请人： Prasad Kotra ,  Sunil Thamaran ,  Shailesh Shah

发明人： Prasad Kotra ,  Sunil Thamaran ,  Shailesh Shah

IPC分类号： H03L7/00

CPC分类号： H03K17/18 ,  G06F1/28 ,  G06F1/30 ,  H03K17/22 ,  H03K17/223

摘要： A programmable low voltage reset apparatus for a device having a plurality of power supplies comprises a low voltage signal generator for sensing when a power supply output decreases below a predetermined voltage and generating a reset signal, a reset selector for selecting one of the power supplies, and a programmable reference voltage for varying a reference voltage according to the voltage of the selected power supply.

摘要翻译： 一种用于具有多个电源的装置的可编程低电压复位装置，包括：低电压信号发生器，用于感测何时电源输出降低到预定电压以下并产生复位信号;复位选择器，用于选择电源之一， 以及用于根据所选电源的电压改变参考电压的可编程参考电压。