公开(公告)号：US07948196B2

公开(公告)日：2011-05-24

申请号：US12099841

申请日：2008-04-09

申请人： Ralph Murray Begun ,  Raymond Mathew Clemo ,  Karl Klaus Dittus ,  Vinod Kamath ,  Michael Sven Miller ,  Warren Everett Price ,  Whitcomb Randolph Scott, III

发明人： Ralph Murray Begun ,  Raymond Mathew Clemo ,  Karl Klaus Dittus ,  Vinod Kamath ,  Michael Sven Miller ,  Warren Everett Price ,  Whitcomb Randolph Scott, III

IPC分类号： G06F1/20 ,  H02P31/00

CPC分类号： G06F1/20 ,  H05K7/20209 ,  Y10S388/934

摘要： A system comprising a chassis that includes a plurality of modules and a fan assembly disposed in a distal end of the chassis for drawing air in parallel pathways through the plurality of modules. At least one of the modules is a compute module having a thermal sensor disposed to sense the temperature of air flowing across a processor mounted on a motherboard. The system further comprises a fan controller receiving output from the thermal sensor, wherein the fan controller operates the fan assembly to cool the plurality of modules and maintain the thermal sensor output within an operating temperature range. The fan controller controls the fan speed according to predetermined thermal profile settings associated with one of the compute modules received in the chassis. For example, the predetermined thermal profile settings may include a minimum fan speed, a maximum fan speed, and control loop feedback settings.

摘要翻译： 一种包括底盘的系统，其包括多个模块和设置在所述底盘的远端中的风扇组件，用于通过所述多个模块的并行路径抽取空气。 至少一个模块是具有热传感器的计算模块，该热传感器设置成感测流过安装在母板上的处理器的空气的温度。 该系统还包括接收来自热传感器的输出的风扇控制器，其中风扇控制器操作风扇组件以冷却多个模块并将热传感器输出保持在工作温度范围内。 风扇控制器根据与在机箱中接收的计算模块之一相关联的预定热分布设置来控制风扇速度。 例如，预定的热分布设置可以包括最小风扇速度，最大风扇速度和控制回路反馈设置。

公开(公告)号：US07984312B2

公开(公告)日：2011-07-19

申请号：US11956889

申请日：2007-12-14

申请人： Ralph Murray Begun ,  Raymond Mathew Clemo ,  Brian Gormley ,  Michael Sven Miller

发明人： Ralph Murray Begun ,  Raymond Mathew Clemo ,  Brian Gormley ,  Michael Sven Miller

IPC分类号： G06F1/26

CPC分类号： G06F1/26

摘要： In one embodiment, a single electrical power supply is used to interchangeably power either a single motherboard or dual motherboards. Switchable output power and individual sequencing may be provided to each motherboard using FETs, such that the power supply may respond to the sequencing of each motherboard as if it were dedicated to that motherboard. In a two motherboard system, power to the first motherboard is reduced by removing some output voltages from the first motherboard. Fault circuitry may also be provided so that a power related fault on one domain does not affect operation of the other motherboard.

摘要翻译： 在一个实施例中，单个电源用于可互换地为单个主板或双主板供电。 可以使用FET向每个主板提供可切换输出功率和单独排序，使得电源可以响应于每个主板的排序，就像它专用于该主板。 在两个主板系统中，通过从第一个主板上移除一些输出电压来减少第一个主板的电源。 还可以提供故障电路，使得一个域上的电力相关故障不影响另一个主板的操作。

公开(公告)号：US5884094A

公开(公告)日：1999-03-16

申请号：US53986

申请日：1998-04-02

申请人： Ralph Murray Begun ,  William Robert Greer ,  Christopher Michael Herring

发明人： Ralph Murray Begun ,  William Robert Greer ,  Christopher Michael Herring

IPC分类号： G06F9/445 ,  G06F13/14

CPC分类号： G06F9/4403 ,  G06F9/4411

摘要： A personal computer system is provided which includes a CPU, with the CPU being operable by a BIOS including initialization or booting instructions. The system includes a local bus and a peripheral bus. A bus interface chip, including a memory controller/peripheral bus host bridge (MC/PBHB) interconnects the local bus and the peripheral bus, and includes a latch which includes as its input clock cycles generated by the CPU. The initialization instructions of the BIOS are contained in a non-volatile ROM module located to write onto either the local bus or the peripheral bus. The MC/PBHB unit is able to decode and handle ROM cycles and is configured to either pass or not pass ROM read cycles depending upon certain control states that identify whether the ROM is located on the local bus or the peripheral bus. Logic is provided to detect during the first ROM CPU cycle whether the ROM is on the peripheral bus or on the local bus, and the MC/PBHB will then either pass the signal to the peripheral bus if that is where the ROM is located, or will not pass it--in which case the local bus controller will take over and read the ROM which must be located on the local bus since it is not located on the peripheral bus.

摘要翻译： 提供了一种个人计算机系统，其包括CPU，CPU可由包括初始化或引导指令的BIOS操作。 该系统包括本地总线和外围总线。 包括存储器控制器/外围总线主机桥（MC / PBHB）的总线接口芯片将局部总线和外围总线互连，并且包括一个锁存器，其包括由CPU产生的输入时钟周期。 BIOS的初始化指令被包含在位于本地总线或外围总线上的非易失性ROM模块中。 MC / PBHB单元能够解码和处理ROM周期，并且被配置为通过或不通过ROM读取周期，这取决于识别ROM位于本地总线或外围总线上的某些控制状态。 提供逻辑以在第一ROM CPU周期期间检测ROM是在外围总线上还是在本地总线上，并且MC / PBHB然后将信号传递到外围总线，如果这是ROM所在的地方，或者 不会通过它 - 在这种情况下，本地总线控制器将接管并读取必须位于本地总线上的ROM，因为它不位于外围总线上。

公开(公告)号：US5878256A

公开(公告)日：1999-03-02

申请号：US777844

申请日：1991-10-16

申请人： Richard Bealkowski ,  Ralph Murray Begun ,  Louis Bennie Capps, Jr.

发明人： Richard Bealkowski ,  Ralph Murray Begun ,  Louis Bennie Capps, Jr.

IPC分类号： G06F9/22 ,  G06F11/14 ,  G06F12/00

CPC分类号： G06F11/1433

摘要： A programmable firmware store for a personal computer system includes a plurality of nonvolatile alterable electronic memories connected in a mutually paralleled circuit arrangement. The memories are connected to a controller that controls the memories to read firmware from and write firmware into the electronic memories, and to write-protect at least one of the memories. Any memory can be write-protected as initially selected by a user or technician of the system. The initial selection can be changed easily to write-protect another of the memories. The firmware in one memory includes code for checking the validity of firmware stored in another memory, and for selecting one or the other of the memories dependent upon a version code of the firmware. The controller also includes an update code for updating the firmware in a selected memory.

摘要翻译： 用于个人计算机系统的可编程固件存储器包括以相互平行的电路布置连接的多个非易失性可变电子存储器。 存储器连接到控制器，其控制存储器以从固件读取固件并将固件写入电子存储器，并且对至少一个存储器进行写保护。 任何存储器可以由系统的用户或技术人员最初选择的写保护。 初始选择可以轻松改变，以便对另一个存储器进行写保护。 一个存储器中的固件包括用于检查存储在另一个存储器中的固件的有效性的代码，以及用于根据固件的版本代码选择一个或另一个存储器。 控制器还包括用于更新选定存储器中的固件的更新代码。

公开(公告)号：US5826075A

公开(公告)日：1998-10-20

申请号：US799486

申请日：1991-11-27

申请人： Richard Bealkowski ,  Ralph Murray Begun

发明人： Richard Bealkowski ,  Ralph Murray Begun

IPC分类号： G06F9/22 ,  G06F11/14 ,  G06F17/30

CPC分类号： G06F11/1433

摘要： An automated programmable firmware store for a personal computer system includes a plurality of nonvolatile alterable electronic memories connected in a mutually paralleled circuit arrangement. The memories are connected to a means for automatically controlling the memories to read firmware from and write firmware into the electronic memories, and to write-protect at least one of the memories. Any memory can be write-protected as initially selected by the automatic control means. The initial selection can be changed easily to write-protect another of the memories. The firmware in one memory includes code for checking the validity of firmware stored in another memory, and for selecting one or the other of the memories dependent upon a version code of the firmware. The control means also includes an update code for updating the firmware in a selected memory. The automated store further includes means for allowing the computer system to recover automatically from invalid firmware stored in one of the memories.

摘要翻译： 用于个人计算机系统的自动可编程固件存储器包括以相互平行的电路布置连接的多个非易失性可变电子存储器。 存储器连接到用于自动控制存储器以从固件读取固件并将固件写入电子存储器的装置，以及对至少一个存储器进行写保护。 任何存储器可以被自动控制装置最初选择的写保护。 初始选择可以轻松改变，以便对另一个存储器进行写保护。 一个存储器中的固件包括用于检查存储在另一个存储器中的固件的有效性的代码，以及用于根据固件的版本代码选择一个或另一个存储器。 控制装置还包括用于更新选定存储器中的固件的更新代码。 自动存储器还包括用于允许计算机系统从存储在其中一个存储器中的无效固件自动恢复的装置。

公开(公告)号：US20090256512A1

公开(公告)日：2009-10-15

申请号：US12099841

申请日：2008-04-09

申请人： Ralph Murray Begun ,  Raymond Mathew Clemo ,  Karl Klaus Dittus ,  Vinod Kamath ,  Michael Sven Miller ,  Warren Everett Price ,  Whitcomb Randolph Scott, III

发明人： Ralph Murray Begun ,  Raymond Mathew Clemo ,  Karl Klaus Dittus ,  Vinod Kamath ,  Michael Sven Miller ,  Warren Everett Price ,  Whitcomb Randolph Scott, III

IPC分类号： H02P31/00 ,  G06F1/20

CPC分类号： G06F1/20 ,  H05K7/20209 ,  Y10S388/934

摘要： A system comprising a chassis that includes a plurality of modules and a fan assembly disposed in a distal end of the chassis for drawing air in parallel pathways through the plurality of modules. At least one of the modules is a compute module having a thermal sensor disposed to sense the temperature of air flowing across a processor mounted on a motherboard. The system further comprises a fan controller receiving output from the thermal sensor, wherein the fan controller operates the fan assembly to cool the plurality of modules and maintain the thermal sensor output within an operating temperature range. The fan controller controls the fan speed according to predetermined thermal profile settings associated with one of the compute modules received in the chassis. For example, the predetermined thermal profile settings may include a minimum fan speed, a maximum fan speed, and control loop feedback settings.

摘要翻译： 一种包括底盘的系统，其包括多个模块和设置在所述底盘的远端中的风扇组件，用于通过所述多个模块的并行路径抽取空气。 至少一个模块是具有热传感器的计算模块，该热传感器设置成感测流过安装在母板上的处理器的空气的温度。 该系统还包括接收来自热传感器的输出的风扇控制器，其中风扇控制器操作风扇组件以冷却多个模块并将热传感器输出保持在工作温度范围内。 风扇控制器根据与在机箱中接收的计算模块之一相关联的预定热分布设置来控制风扇速度。 例如，预定的热分布设置可以包括最小风扇速度，最大风扇速度和控制回路反馈设置。

公开(公告)号：US20090158057A1

公开(公告)日：2009-06-18

申请号：US11956889

申请日：2007-12-14

申请人： Ralph Murray Begun ,  Raymond Mathew Clemo ,  Brian Gormley ,  Michael Sven Miller

发明人： Ralph Murray Begun ,  Raymond Mathew Clemo ,  Brian Gormley ,  Michael Sven Miller

IPC分类号： G06F1/26

CPC分类号： G06F1/26

摘要： In one embodiment, a single electrical power supply is used to interchangeably power either a single motherboard or dual motherboards. Switchable output power and individual sequencing may be provided to each motherboard using FETs, such that the power supply may respond to the sequencing of each motherboard as if it were dedicated to that motherboard. In a two motherboard system, power to the first motherboard is reduced by removing some output voltages from the first motherboard. Fault circuitry may also be provided so that a power related fault on one domain does not affect operation of the other motherboard.

摘要翻译： 在一个实施例中，单个电源用于可互换地为单个主板或双主板供电。 可以使用FET向每个主板提供可切换输出功率和单独排序，使得电源可以响应于每个主板的排序，就像它专用于该主板。 在两个主板系统中，通过从第一个主板上移除一些输出电压来减少第一个主板的电源。 还可以提供故障电路，使得一个域上的电力相关故障不影响另一个主板的操作。

公开(公告)号：US5680556A

公开(公告)日：1997-10-21

申请号：US706934

申请日：1996-09-03

申请人： Ralph Murray Begun ,  William Robert Greer ,  Christopher Michael Herring

发明人： Ralph Murray Begun ,  William Robert Greer ,  Christopher Michael Herring

IPC分类号： G06F9/445 ,  G06F13/00

CPC分类号： G06F9/4403 ,  G06F9/4411

摘要： A personal computer system is provided which includes a CPU, with the CPU being operable by a BIOS including initialization or booting instructions. The system includes a local bus and a peripheral bus. A bus interface chip, including a memory controller/peripheral bus host bridge (MC/PBHB) interconnects the local bus and the peripheral bus, and includes a latch which includes as its input clock cycles generated by the CPU. The initialization instructions of the BIOS are contained in a non-volatile ROM module located to write onto either the local bus or the peripheral bus. The MC/PBHB unit is able to decode and handle ROM cycles and is configured to either pass or not pass ROM read cycles depending upon certain control states that identify whether the ROM is located on the local bus or the peripheral bus. Logic is provided to detect during the first ROM CPU cycle whether the ROM is on the peripheral bus or on the local bus, and the MC/PBHB will then either pass the signal to the peripheral bus if that is where the ROM is located, or will not pass it--in which case the local bus controller will take over and read the ROM which must be located on the local bus since it is not located on the peripheral bus.

摘要翻译： 提供了一种个人计算机系统，其包括CPU，CPU可由包括初始化或引导指令的BIOS操作。 该系统包括本地总线和外围总线。 包括存储器控制器/外围总线主机桥（MC / PBHB）的总线接口芯片将局部总线和外围总线互连，并且包括一个锁存器，其包括由CPU产生的输入时钟周期。 BIOS的初始化指令被包含在位于本地总线或外围总线上的非易失性ROM模块中。 MC / PBHB单元能够解码和处理ROM周期，并且被配置为通过或不通过ROM读取周期，这取决于识别ROM位于本地总线或外围总线上的某些控制状态。 提供逻辑以在第一ROM CPU周期期间检测ROM是在外围总线上还是在本地总线上，并且MC / PBHB然后将信号传递到外围总线，如果这是ROM所在的地方，或者 不会通过它 - 在这种情况下，本地总线控制器将接管并读取必须位于本地总线上的ROM，因为它不位于外围总线上。

公开(公告)号：US5802393A

公开(公告)日：1998-09-01

申请号：US837756

申请日：1997-04-22

申请人： Ralph Murray Begun ,  William Robert Greer ,  Christopher Michael Herring

发明人： Ralph Murray Begun ,  William Robert Greer ,  Christopher Michael Herring

IPC分类号： G06F9/445 ,  G06F13/14

CPC分类号： G06F9/4403 ,  G06F9/4411

摘要： A personal computer system is provided which includes a CPU, with the CPU being operable by a BIOS including initialization or booting instructions. The system includes a local bus and a peripheral bus. A bus interface chip, including a memory controller/peripheral bus host bridge (MC/PBHB) interconnects the local bus and the peripheral bus, and includes a latch which includes as its input clock cycles generated by the CPU. The initialization instructions of the BIOS are contained in a non-volatile ROM module located to write onto either the local bus or the peripheral bus. The MC/PBHB unit is able to decode and handle ROM cycles and is configured to either pass or not pass ROM read cycles depending upon certain control states that identify whether the ROM is located on the local bus or the peripheral bus. Logic is provided to detect during the first ROM CPU cycle whether the ROM is on the peripheral bus or on the local bus, and the MC/PBHB will then either pass the signal to the peripheral bus if that is where the ROM is located, or will not pass it--in which case the local bus controller will take over and read the ROM which must be located on the local bus since it is not located on the peripheral bus.

摘要翻译： 提供了一种个人计算机系统，其包括CPU，CPU可由包括初始化或引导指令的BIOS操作。 该系统包括本地总线和外围总线。 包括存储器控制器/外围总线主机桥（MC / PBHB）的总线接口芯片将局部总线和外围总线互连，并且包括一个锁存器，其包括由CPU产生的输入时钟周期。 BIOS的初始化指令被包含在位于本地总线或外围总线上的非易失性ROM模块中。 MC / PBHB单元能够解码和处理ROM周期，并且被配置为通过或不通过ROM读取周期，这取决于识别ROM位于本地总线或外围总线上的某些控制状态。 提供逻辑以在第一ROM CPU周期期间检测ROM是在外围总线上还是在本地总线上，并且MC / PBHB然后将信号传递到外围总线（如果是ROM所在的地方），或者 不会通过它 - 在这种情况下，本地总线控制器将接管并读取必须位于本地总线上的ROM，因为它不位于外围总线上。