Pulse generator
    1.
    发明授权
    Pulse generator 失效
    脉冲发生器

    公开(公告)号:US4251722A

    公开(公告)日:1981-02-17

    申请号:US71440

    申请日:1979-08-31

    申请人: Remi Vautier

    发明人: Remi Vautier

    CPC分类号: B41B25/10 G06F7/68 G06K15/10

    摘要: A pulse generating device for speeding-up the rate of a pulse train from N to N+n wherein each of the pulses in the N+n pulse train is synchronized with the immediately preceding pulse in the original N pulse train. A count-up counter is reset upon each original pulse and counts up from zero, at frequency F/N+n, up to the following original pulse. A count-down counter is loaded with the contents of the count-up counter when the following original pulse occurs or when the output pulses occur with the exception of the last pulse in the interval when the time interval between said original pulses includes several generated output pulses, and is decremented at frequency F/M up to zero. A variable presettable counter provides the count-down counter with frequency F/M when each original pulse appears or when the output pulses appear with the exception of the last pulse in the interval when the time interval between the original pulses includes several output pulses. A control memory supplies values M to the variable counter in response to the original pulses or to the output pulses with the exception of the last pulse in the time interval between two original pulses. The output pulses are produced each time the count-down counter reaches value zero.

    摘要翻译: 一种用于加速从N到N + n的脉冲串速率的脉冲发生装置,其中N + n个脉冲串中的每个脉冲与原始N脉冲串中的紧邻在前的脉冲同步。 在每个原始脉冲上复位递增计数器,并从零开始计数,频率为F / N + n,直到下一个原始脉冲。 当发生以下原始脉冲时,或者当所述原始脉冲之间的时间间隔包括几个产生的输出时,当间隔中的最后脉冲除外时输出脉冲发生时,递减计数器加载了递增计数器的内容 脉冲,并以频率F / M递减至零。 可变可预置计数器在出现每个原始脉冲时或者当原始脉冲之间的时间间隔包括多个输出脉冲时间间隔内的最后一个脉冲之外出现输出脉冲时,提供具有频率F / M的递减计数器。 控制存储器响应于原始脉冲向可变计数器提供值M,或者在两个原始脉冲之间的时间间隔内的最后脉冲之外将输出脉冲提供给输出脉冲。 每次倒数计数器达到零值时都会产生输出脉冲。

    Modem-telephone coupler
    2.
    发明授权
    Modem-telephone coupler 失效
    调制解调器电话耦合器

    公开(公告)号:US5239580A

    公开(公告)日:1993-08-24

    申请号:US779774

    申请日:1991-10-21

    CPC分类号: H04M11/06 H04M19/08

    摘要: Coupling device for the connection of a Data Circuit Terminating Equipment DCE to a given Public Switched Telephone Network PSTN and to a local telephone set. The coupler includes means for providing said local telephone set with DC current whereby the microphone and the headphone of the telephone can be used respectively for transmitting and receiving vocal messages from the a DTE which is connected to said DCE. The invention also provides a DCE for the connection of a DTE to a a PSTN and to a local telephone set including a coupler circuit having the electronic components matching the electric requirements of a given PSTN. The coupler further includes means for providing the telephone set with DC current whereby vocal messages can be transmitted and received from the DTE to the telephone set. The invention further provides a DCE for the connection of a DTE to a PSTN and to a local telephone set which includes means for removably attaching a coupler circuit having the electronic components matching the electrical requirements of a given PSTN and further including means for providing the telephone set with DC current whereby vocal messages can be transmitted and received from the telephone set to the DTE.

    Time division multiplex data transmission system
    3.
    发明授权
    Time division multiplex data transmission system 失效
    时分复用数据传输系统

    公开(公告)号:US3970798A

    公开(公告)日:1976-07-20

    申请号:US569718

    申请日:1975-04-21

    摘要: The structure described is a switching-processing node for high speed data transmission systems. Information is transmitted in time slot channels, one of which is control information. Data to be passed through a node is stripped of control characters, passed to a transmitting unit and there re-encoded with such additional data bits as needed. Data for the node is switched from an input decoder to a processor input and data for transmission is switched to a transmission unit for encoding.A switching information control frame can be passed over the system to set the switching circuits at a node to operate at the appropriate time slots of the data frames.

    摘要翻译: 所描述的结构是用于高速数据传输系统的切换处理节点。 信息在时隙信道中发送,其中之一是控制信息。 通过节点传递的数据被剥离了控制字符,传递给发送单元,并根据需要重新编码了这样的附加数据位。 节点的数据从输入解码器切换到处理器输入,并且用于传输的数据被切换到用于编码的传输单元。