公开(公告)号：US06636936B2

公开(公告)日：2003-10-21

申请号：US09544379

申请日：2000-04-06

申请人： Richard Shaw Terrill ,  Robert Richard Noel Bielby

发明人： Richard Shaw Terrill ,  Robert Richard Noel Bielby

IPC分类号： G06F1300

CPC分类号： G06F11/1417 ,  G06F15/177

摘要： Apparatus and methods for configuring a plurality of programmable logic devices which include the steps of providing a source of configuration data and transferring the configuration data directly from the source to each of the programmable logic devices. In some embodiments, the methods permit the programmable logic devices to configure themselves without the intervention of an intelligent host such as a CPU, a microcontroller, or other types of intelligent logic. In other embodiments, configuration data files are used in conjunction with an intelligent host to configure the programmable logic devices. Configuration is performed at power-up or, alternatively, under user or software control.

摘要翻译： 用于配置多个可编程逻辑器件的装置和方法包括以下步骤：提供配置数据源，并将配置数据直接从源传送到每个可编程逻辑器件。 在一些实施例中，该方法允许可编程逻辑器件配置自身而不需要诸如CPU，微控制器或其他类型的智能逻辑的智能主机的介入。 在其他实施例中，配置数据文件与智能主机结合使用以配置可编程逻辑设备。 配置在上电时或在用户或软件控制下执行。

公开(公告)号：US6052755A

公开(公告)日：2000-04-18

申请号：US709491

申请日：1996-09-06

申请人： Richard Shaw Terrill ,  Robert Richard Noel Bielby

发明人： Richard Shaw Terrill ,  Robert Richard Noel Bielby

IPC分类号： G06F11/14 ,  G06F15/177 ,  G06F13/00

CPC分类号： G06F11/1417 ,  G06F15/177

摘要： Apparatus and methods for configuring a plurality of programmable logic devices which include the steps of providing a source of configuration data and transferring the configuration data directly from the source to each of the programmable logic devices. In some embodiments, the methods permit the programmable logic devices to configure themselves without the intervention of an intelligent host such as a CPU, a microcontroller, or other types of intelligent logic. In other embodiments, configuration data files are used in conjunction with an intelligent host to configure the programmable logic devices. Configuration is performed at power-up or, alternatively, under user or software control.

公开(公告)号：US06191608B1

公开(公告)日：2001-02-20

申请号：US08851250

申请日：1997-05-05

申请人： Richard G. Cliff ,  Srinivas T. Reddy ,  Kerry Veenstra ,  Andreas Papaliolios ,  Chiakang Sung ,  Richard Shaw Terrill ,  Rina Raman ,  Robert Richard Noel Bielby

发明人： Richard G. Cliff ,  Srinivas T. Reddy ,  Kerry Veenstra ,  Andreas Papaliolios ,  Chiakang Sung ,  Richard Shaw Terrill ,  Rina Raman ,  Robert Richard Noel Bielby

IPC分类号： H03K19177

CPC分类号： H03K19/17776 ,  G06F17/5054 ,  H03K19/1774 ,  H03K19/17748

摘要： Programmable logic array devices are programmed from programming devices in networks that facilitate programming any number of such logic devices with programs of any size or complexity. The source of programming data and control may be a microprocessor or one or more serial EPROMs, one EPROM being equipped with a clock circuit. Several parallel data streams may be used to speed up the programming operation. A clock circuit with a programmably variable speed may be provided to facilitate programming logic devices with different speed characteristics. The programming protocol may include an acknowledgment from the logic device(s) to the programming data source after each programming data transmission so that the source can automatically transmit programming data at the speed at which the logic device is able to accept that data.

摘要翻译： 可编程逻辑阵列器件由网络中的编程设备编程，这些器件可以利用任何大小或复杂度的程序来编程任何数量的这种逻辑器件。 编程数据和控制的源可以是微处理器或一个或多个串行EPROM，一个EPROM配备有时钟电路。 可以使用几个并行数据流来加速编程操作。 可以提供具有可编程可变速度的时钟电路以便于具有不同速度特性的编程逻辑器件。 编程协议可以包括在每个编程数据传输之后从逻辑设备到编程数据源的确认，使得源可以以逻辑设备能够接受该数据的速度自动发送编程数据。

公开(公告)号：US06384630B2

公开(公告)日：2002-05-07

申请号：US09760231

申请日：2001-01-12

申请人： Richard G. Cliff ,  Srinivas T. Reddy ,  Kerry Veenstra ,  Andreas Papaliolios ,  Chiakang Sung ,  Richard Shaw Terrill ,  Rina Raman ,  Robert Richard Noel Bielby

发明人： Richard G. Cliff ,  Srinivas T. Reddy ,  Kerry Veenstra ,  Andreas Papaliolios ,  Chiakang Sung ,  Richard Shaw Terrill ,  Rina Raman ,  Robert Richard Noel Bielby

IPC分类号： H03K19177

CPC分类号： H03K19/17776 ,  G06F17/5054 ,  H03K19/1774 ,  H03K19/17744 ,  H03K19/17748

摘要： Programmable logic array devices are programmed from programming devices in networks that facilitate programming any number of such logic devices with programs of any size or complexity. The source of programming data and control may be a microprocessor or one or more serial EPROMs, one EPROM being equipped with a clock circuit. Several parallel data streams may be used to speed up the programming operation. A clock circuit with a programmably variable speed may be provided to facilitate programming logic devices with different speed characteristics. The programming protocol may include an acknowledgment from the logic device(s) to the programming data source after each programming data transmission so that the source can automatically transmit programming data at the speed at which the logic device is able to accept that data.

摘要翻译： 可编程逻辑阵列器件由网络中的编程设备编程，这些器件可以利用任何大小或复杂度的程序来编程任何数量的这种逻辑器件。 编程数据和控制的源可以是微处理器或一个或多个串行EPROM，一个EPROM配备有时钟电路。 可以使用几个并行数据流来加速编程操作。 可以提供具有可编程可变速度的时钟电路以便于具有不同速度特性的编程逻辑器件。 编程协议可以包括在每个编程数据传输之后从逻辑设备到编程数据源的确认，使得源可以以逻辑设备能够接受该数据的速度自动发送编程数据。