公开(公告)号：US08341382B2

公开(公告)日：2012-12-25

申请号：US12895406

申请日：2010-09-30

Applicant: Craig MacKenna ,  Rick Varney ,  Gregory Goodhue

Inventor： Craig MacKenna ,  Rick Varney ,  Gregory Goodhue

IPC: G06F9/30

CPC classification number: G06F12/0862

Abstract: A microcontroller using an optimized buffer replacement strategy comprises a memory configured to store instructions, a processor configured to execute said program instructions, and a memory accelerator operatively coupled between the processor and the memory. The memory accelerator is configured to receive an information request and overwrite the buffer from which the prefetch was initiated with the requested information when the request is fulfilled by a previously initiated prefetch operation.

Abstract translation: 使用优化的缓冲器替换策略的微控制器包括被配置为存储指令的存储器，被配置为执行所述程序指令的处理器以及可操作地耦合在处理器和存储器之间的存储器加速器。 存储器加速器被配置为当通过先前发起的预取操作来满足请求时，接收信息请求并覆盖从所请求的信息发起预取的缓冲器。

公开(公告)号：US20090222652A1

公开(公告)日：2009-09-03

申请号：US12064377

申请日：2006-08-22

Applicant: Ata Khan ,  Greg Goodhue ,  Pankaj Shrivastava ,  Bas Van Der Veer ,  Rick Varney ,  Prithm Nagaraj

Inventor： Ata Khan ,  Greg Goodhue ,  Pankaj Shrivastava ,  Bas Van Der Veer ,  Rick Varney ,  Prithm Nagaraj

IPC: G06F12/14 ,  G06F11/27 ,  G06F9/00

CPC classification number: G06F12/1433

Abstract: One embodiment of the present application includes a microcontroller (30) that has an embedded memory (46), a programmable processor (32), and a test interface (34). The memory (46) is accessible through the test interface (34). In response to resetting this microcontroller (30), a counter is started and the test interface (34) is initially set to a disabled state while an initiation program is executed. The test interface (34) is changed to an enabled state—such that access to the embedded memory (46) is permitted through it—when the counter reaches a predefined value unless the microcontroller (30) executes programming code before the predefined value is reached to provide the disabled state during subsequent microcontroller (30) operation.

Abstract translation: 本申请的一个实施例包括具有嵌入式存储器（46），可编程处理器（32）和测试接口（34）的微控制器（30）。 存储器（46）可通过测试接口（34）访问。 响应于复位该微控制器（30），启动计数器，并且在执行启动程序的同时将测试接口（34）初始设置为禁用状态。 测试接口（34）被改变为使能状态，使得通过该接口允许对嵌入式存储器（46）的访问 - 当计数器达到预定值时，除非微控制器（30）在达到预定义值之前执行编程代码 以在随后的微控制器（30）操作期间提供禁用状态。

公开(公告)号：US08065512B2

公开(公告)日：2011-11-22

申请号：US12064377

申请日：2006-08-22

Applicant: Ata Khan ,  Greg Goodhue ,  Pankaj Shrivastava ,  Bas Van Der Veer ,  Rick Varney ,  Prithvi Nagaraj

Inventor： Ata Khan ,  Greg Goodhue ,  Pankaj Shrivastava ,  Bas Van Der Veer ,  Rick Varney ,  Prithvi Nagaraj

IPC: G06F9/00 ,  G06F17/50 ,  G06F9/445 ,  G06F12/00 ,  G06F9/44 ,  G06F7/04 ,  G06F11/00 ,  G01R27/28

CPC classification number: G06F12/1433

Abstract: One embodiment of the present application includes a microcontroller (30) that has an embedded memory (46), a programmable processor (32), and a test interface (34). The memory (46) is accessible through the test interface (34). In response to resetting this microcontroller (30), a counter is started and the test interface (34) is initially set to a disabled state while an initiation program is executed. The test interface (34) is changed to an enabled state—such that access to the embedded memory (46) is permitted through it—when the counter reaches a predefined value unless the microcontroller (30) executes programming code before the predefined value is reached to provide the disabled state during subsequent microcontroller (30) operation.

Abstract translation: 本申请的一个实施例包括具有嵌入式存储器（46），可编程处理器（32）和测试接口（34）的微控制器（30）。 存储器（46）可通过测试接口（34）访问。 响应于复位该微控制器（30），启动计数器，并且在执行启动程序的同时将测试接口（34）初始设置为禁用状态。 测试接口（34）被改变为使能状态，使得通过该接口允许对嵌入式存储器（46）的访问 - 当计数器达到预定值时，除非微控制器（30）在达到预定义值之前执行编程代码 以在随后的微控制器（30）操作期间提供禁用状态。