公开(公告)号：US5285153A

公开(公告)日：1994-02-08

申请号：US947729

申请日：1992-09-21

申请人： Bahram Ahanin ,  Craig S. Lytle ,  Ricky W. Ho

发明人： Bahram Ahanin ,  Craig S. Lytle ,  Ricky W. Ho

IPC分类号： G01R31/317 ,  G01R31/3185 ,  G01R31/28

CPC分类号： G01R31/318558 ,  G01R31/31707

摘要： Scan testing of asynchronous logic circuitry is facilitated by gating off the asynchronous inputs to flip-flops during scan testing. If desired, the asynchronous inputs which are gated off in this manner may themselves be tested by connecting them to one or more output terminals or scan registers during testing. Alternatively, the asynchronous inputs which are gated could be tested by selectively enabling the signals at strategic points during scan testing. The number of input terminals required to control the test mode may be reduced by providing registers for storing test control signals applied to normal input terminals at the beginning of a test cycle. Once these test control signals are stored, the normal input terminals are free to return to their normal use.

摘要翻译： 通过在扫描测试期间门控异步输入到触发器来促进异步逻辑电路的扫描测试。 如果需要，以这种方式门控的异步输入本身可以通过在测试期间将它们连接到一个或多个输出端子或扫描寄存器来进行测试。 或者，可以通过在扫描测试期间在战略点上选择性地启用信号来测试门控的异步输入。 通过提供用于存储在测试周期开始时施加到正常输入端的测试控制信号的寄存器，可以减少控制测试模式所需的输入端子的数量。 一旦存储了这些测试控制信号，正常输入端可以自由返回正常使用。

公开(公告)号：US5166604A

公开(公告)日：1992-11-24

申请号：US611974

申请日：1990-11-13

申请人： Bahram Ahanin ,  Craig S. Lytle ,  Ricky W. Ho

发明人： Bahram Ahanin ,  Craig S. Lytle ,  Ricky W. Ho

IPC分类号： G01R31/317 ,  G01R31/3185

CPC分类号： G01R31/318558 ,  G01R31/31707

摘要： Scan testing of asynchronous logic circuitry is facilitated by gating off the asynchronous inputs to flip-flops during scan testing. If desired, the asynchronous inputs which are gated off in this manner may themselves terminals or scan registers during testing. Alternatively, the asynchronous inputs which are gated could be tested by selectively enabling the signals at strategic points during scan testing. The number of input terminals required to control the test mode may be reduced by providing registers for storing test control signals applied to normal input terminals at the beginning of a test cycle. Once these test control signals are stored, the normal input terminals are free to return to their normal use.

摘要翻译： 通过在扫描测试期间门控异步输入到触发器来促进异步逻辑电路的扫描测试。 如果需要，以这种方式门控的异步输入端可能在测试期间本身可以是终端或扫描寄存器。 或者，可以通过在扫描测试期间在战略点上选择性地启用信号来测试门控的异步输入。 通过提供用于存储在测试周期开始时施加到正常输入端的测试控制信号的寄存器，可以减少控制测试模式所需的输入端子的数量。 一旦存储了这些测试控制信号，正常输入端可以自由返回正常使用。