公开(公告)号：US5394498A

公开(公告)日：1995-02-28

申请号：US148039

申请日：1993-11-05

申请人： Stephen J. Hinterlong ,  Robert A. Novotny ,  Jose M. Sasian-Alvarado

发明人： Stephen J. Hinterlong ,  Robert A. Novotny ,  Jose M. Sasian-Alvarado

IPC分类号： G02B6/36 ,  G02B6/38 ,  G02B6/04

CPC分类号： G02B6/3672 ,  G02B6/3834 ,  G02B6/3644 ,  G02B6/3692 ,  G02B6/3837

摘要： A fiber optical array with precision fiber and positioning and a process for manufacturing such an array. The position of the ends of the optical fibers depends upon placement within a target that has been lithographed using highly precise lithography similar to that used in VLSI integrated circuits. The placement of an end with its core within its target is performed with the aid of microscopes and micro-manipulators. Once an end is in the proper location, ultraviolet curable adhesive is used to permanently fix its position precisely. Arrays having positional precision to within 1 micrometer are achievable by this invention.

摘要翻译： 具有精密光纤和定位的光纤阵列及其制造方法。 光纤端部的位置取决于使用类似于VLSI集成电路中使用的高精度光刻技术已经被平版印刷的目标内的放置。 借助于显微镜和微型操纵器来实现其核心在其目标内的末端放置。 一旦结束处于正确的位置，紫外线固化粘合剂就被用来精确地固定其位置。 位置精度在1微米以内的阵列可以通过本发明实现。

公开(公告)号：US5581077A

公开(公告)日：1996-12-03

申请号：US270952

申请日：1994-07-05

申请人： Leo M. Chirovsky ,  Robert A. Novotny ,  Ted K. Woodward

发明人： Leo M. Chirovsky ,  Robert A. Novotny ,  Ted K. Woodward

IPC分类号： H03F3/08 ,  H03K17/785 ,  H04B10/04 ,  H04B10/06 ,  H04B10/14 ,  H04B10/26 ,  H04B10/28 ,  H01J40/14

CPC分类号： H03K17/785

摘要： The present invention provides a high impedance optical receiver circuit for use in integrated circuits. The receiver circuit consists of an optical detecting device connected to the gate of an FET device and further connected to a diode providing a load impedance. The FET device is connected to a biasing voltage through a biasing resistive element and to a conditioning stage output. The use of a diode to provide a load impedance allows for a smaller and easier to manufacture receiver circuit than would be possible using either a load resistor or a load FET. According to one aspect of the present invention, a digital integrated circuit employing SEED technology incorporates a plurality of diode-loaded receiver in an array of optical receiver circuits to reduce the footprint of the overall SEED circuit array.

摘要翻译： 本发明提供一种用于集成电路的高阻抗光接收器电路。 接收器电路包括连接到FET器件的栅极的光检测器件，并进一步连接到提供负载阻抗的二极管。 FET器件通过偏置电阻元件和调节级输出端连接到偏置电压。 使用二极管提供负载阻抗允许比使用负载电阻器或负载FET可能更小且更容易地制造接收器电路。 根据本发明的一个方面，采用SEED技术的数字集成电路将多个负载二极管的接收器结合在光接收器电路阵列中，以减小整个SEED电路阵列的覆盖区。

公开(公告)号：US5606317A

公开(公告)日：1997-02-25

申请号：US353410

申请日：1994-12-09

申请人： Thomas J. Cloonan ,  Robert A. Novotny ,  Randy M. Olenz ,  Gaylord W. Richards ,  Michael J. Wojcik

发明人： Thomas J. Cloonan ,  Robert A. Novotny ,  Randy M. Olenz ,  Gaylord W. Richards ,  Michael J. Wojcik

IPC分类号： H04L25/49 ,  H03M7/00

CPC分类号： H04L25/4908

摘要： A method and apparatus for encoding and decoding m-bit groups of digital data, where m is at least eight, into serial n bit groups such that each encoded serial n-bit group has sufficient data transitions therein to maintain the synchronization of a phase locked loop clock recovery circuit in a high speed serial link of a communication path. Further, this method and apparatus provides a duty cycle that is within an operational range of the ideal 50 percent, which reduces voltage drift of a.c. coupled high speed serial data links, or reduces thermal drift of optically coupled high speed serial data links.

摘要翻译： 一种用于将m个至少八个数字数据的m位组编码和解码成串行n位组的方法和装置，使得每个编码的串行n位组在其中具有足够的数据转换，以保持锁相的同步 通信路径的高速串行链路中的环路时钟恢复电路。 此外，该方法和装置提供了在理想的50％的工作范围内的占空比，这降低了交流电压的漂移。 耦合的高速串行数据链路，或减少光耦合的高速串行数据链路的热漂移。