Data communications bit stream combiner/decombiner
    1.
    发明授权
    Data communications bit stream combiner/decombiner 失效
    数据通信位流组合器/分解器

    公开(公告)号:US06625241B2

    公开(公告)日:2003-09-23

    申请号:US09352491

    申请日:1999-07-13

    申请人: Robert G. Mejia

    发明人: Robert G. Mejia

    IPC分类号: H04B700

    CPC分类号: H04J3/24 H04J3/0685 H04J3/07

    摘要: A method and apparatus for multiplexing and demultiplexing multiple serial data streams provide double the data throughput on a single media channel, such as Fibre Channel (EC). A first incoming data stream is routed to a first synchronizer unit, which receives a 0-degree phase signal of a local clock operating at the same basic frequency as that of the incoming data. The first synchronizer unit establishes and maintains synchronization of the first data stream with the 0-degree phase signal. A second incoming data stream is routed to a second synchronizer unit, which receives a 180-degree phase signal of the local clock. The second synchronizer unit establishes and maintains synchronization of the second data stream with the 180-degree phase signal. The synchronizer units maintain synchronization of the respective data streams by applying an elasticity function to the data streams. After synchronization to the local clock, the two resultant data streams are multiplexed by an interleaver at double the baud rate. Bits are taken alternately from the two resultant data streams, resulting in an output data stream containing all of the bits from both resultant data streams and all of the data bits from both input data streams. Even numbered bits in the combined stream originate from one resultant data stream, while the odd numbered bits originate from the other.

    摘要翻译: 用于复用和解复用多个串行数据流的方法和装置在诸如光纤通道(EC)的单个媒体信道上提供了两倍的数据吞吐量。 第一输入数据流被路由到第一同步器单元,其接收以与输入数据相同的基本频率工作的本地时钟的0度相位信号。 第一同步器单元建立并保持第一数据流与0度相位信号的同步。 第二输入数据流被路由到第二同步器单元,其接收本地时钟的180度相位信号。 第二同步器单元建立并保持第二数据流与180度相位信号的同步。 同步器单元通过对数据流应用弹性函数来维持相应数据流的同步。 在与本地时钟同步之后,两个结果数据流被交织器复用为波特率的两倍。 从两个结果数据流交替地进行位,从而产生包含来自两个结果数据流的所有位的输出数据流和来自两个输入数据流的所有数据位。 组合流中的偶数位源自一个结果数据流,而奇数比特来源于另一个。

    Contact probe storage fet sensor and write heater arrangements
    2.
    发明授权
    Contact probe storage fet sensor and write heater arrangements 失效
    接触探头存储fet传感器和写加热器布置

    公开(公告)号:US07460462B2

    公开(公告)日:2008-12-02

    申请号:US10736600

    申请日:2003-12-17

    IPC分类号: G11B11/00

    摘要: A read/write arrangement for a contact probe storage arrangement or the like, has a cantilever disposed with a medium which is movable relative to the cantilever; a device associated with one of the cantilever and the medium which is configured to be responsive to changes in electrical field between the medium and the cantilever caused by a change in distance between the medium and the cantilever; a heater disposed on the cantilever for heating the medium and for inducing localized topographical changes which represent bits of data; and a circuit which electrically interconnects both of the device and the heater.

    摘要翻译: 用于接触探针存储装置等的读/写装置具有悬臂,其布置有可相对于悬臂运动的介质; 与所述悬臂和所述介质中的一个相关联的装置,其被配置为响应于由所述介质和所述悬臂之间的距离的变化引起的所述介质和所述悬臂之间的电场的变化; 设置在所述悬臂上用于加热所述介质并且用于引起表示数据位的局部地形变化的加热器; 以及将装置和加热器两者电连接的电路。

    Information transfer protocol having sync fields of different lengths
    3.
    发明授权
    Information transfer protocol having sync fields of different lengths 失效
    信息传输协议具有不同长度的同步字段

    公开(公告)号:US07007120B2

    公开(公告)日:2006-02-28

    申请号:US10423103

    申请日:2003-04-25

    IPC分类号: G06F13/00 G06F13/42

    摘要: Systems and methods of information transfer are disclosed. In one embodiment, the system may comprise a master device and a slave device coupled by a bus in which clock information is embedded in the data stream. Various flow control techniques may be used to compensate for differences in transfer rates supported by the master and slave devices. Two types of synchronization fields may be employed to establish and maintain clock acquisition. The master device may transfer information to the slave device using a sync field of a first type followed by a first data packet, and the slave device may respond to each data packet with a sync field of a second, different type, followed by a status ready field if no additional time is needed before receiving another data packet.

    摘要翻译: 披露了信息传递的系统和方法。 在一个实施例中,系统可以包括通过总线耦合的主设备和从设备,其中时钟信息嵌入在数据流中。 可以使用各种流量控制技术来补偿由主设备和从设备支持的传输速率的差异。 可以采用两种类型的同步字段来建立和维持时钟采集。 主设备可以使用第一类型的同步字段后跟第一数据分组来将信息传送到从设备,并且从设备可以用第二种不同类型的同步字段响应每个数据分组,随后是状态 如果在接收另一个数据包之前不需要额外的时间,就准备就绪。

    Statistical methods and systems for data rate detection for multi-speed embedded clock serial receivers
    4.
    发明授权
    Statistical methods and systems for data rate detection for multi-speed embedded clock serial receivers 失效
    用于多速嵌入式时钟串行接收机的数据速率检测的统计方法和系统

    公开(公告)号:US06680970B1

    公开(公告)日:2004-01-20

    申请号:US09577216

    申请日:2000-05-23

    申请人: Robert G. Mejia

    发明人: Robert G. Mejia

    IPC分类号: H04B1700

    摘要: Methods and systems for data rate detection for multi-speed embedded clock serial receivers are described. In one embodiment, a method of determining a data rate of a high speed serially transmitted data stream comprises statistically examining edge characteristics of the incoming data stream. Based on the edge characteristics, a signature is identified that is associated with the edge characteristics. Based on the identified signature, a data rate at which the data stream is being transmitted is determined. In one embodiment, a clock extraction/data recovery circuit is provided for recovering an embedded clock and data from a high speed serially transmitted data stream. The circuit comprises a phase comparator that is configured to receive a high speed serially transmitted data stream and output indicia whenever the data stream experiences a data transition. A voltage controlled oscillator (VCO) is connected with the phase comparator and provides a clock signal having clock edges. The clock signal is locked to the data stream. A data rate detection circuit is connected with the phase comparator and receives the series of pulses that are output by the phase comparator. Based on the received pulses, the data rate detection circuit ascertains a data rate at which the data stream is transmitted.

    摘要翻译: 描述了用于多速嵌入式时钟串行接收机的数据速率检测的方法和系统。 在一个实施例中,确定高速串行传输数据流的数据速率的方法包括统计检查输入数据流的边缘特性。 基于边缘特征,识别与边缘特征相关联的签名。 基于所识别的签名,确定正在发送数据流的数据速率。 在一个实施例中,提供了一种时钟提取/数据恢复电路,用于从高速串行传输的数据流中恢复嵌入的时钟和数据。 电路包括相位比较器,其被配置为每当数据流经历数据转换时接收高速串行传输的数据流和输出标记。 压控振荡器(VCO)与相位比较器连接,并提供具有时钟沿的时钟信号。 时钟信号被锁定到数据流。 数据速率检测电路与相位比较器连接,并接收由相位比较器输出的一系列脉冲。 数据速率检测电路基于所接收的脉冲确定发送数据流的数据速率。

    Digital data pattern detection methods and arrangements

    公开(公告)号:US06658363B2

    公开(公告)日:2003-12-02

    申请号:US09766903

    申请日:2001-01-18

    IPC分类号: G06F1900

    摘要: Pattern detection methods and arrangements are provided for monitoring a Fibre Channel, a Gigabit Ethernet, or other like data stream for programmable trigger patterns. Upon detecting a trigger pattern, the pattern detection methods and arrangements will assert an output. The output is useful for triggering oscilloscopes to be able to properly display the signal and more importantly, for arming time interval analyzers and other like test instruments. The pattern detection methods and arrangements are capable of dealing with elasticity in the data transmission channel. For example, the trigger pattern can be uniquely configured to a frame header or frame contents and the test instrument can be set to limit its sampling to within the frame bounds. In this manner all of the variability of fill transmission words appearing or disappearing essentially becomes transparent to the test instrument.

    Fiber channel arbitrated loop dynamic loop sizing
    6.
    发明授权
    Fiber channel arbitrated loop dynamic loop sizing 失效
    光纤通道仲裁环路动态环路大小

    公开(公告)号:US06504817B2

    公开(公告)日:2003-01-07

    申请号:US08828985

    申请日:1997-03-31

    IPC分类号: H04L100

    CPC分类号: H04L12/433

    摘要: In a Fiber Channel Arbitrated Loop communications architecture, dynamic loop sizing includes selectively bypassing operational device ports in the loop in order to minimize overhead associated with loop size. In redundant systems with multiple loops, the system is optimized by judicious distribution of the bypassed ports among the loops. Redundancy is at no point reduced. By bypassing unused or unneeded ports off of a loop, the round trip delay of the loop is appreciably shortened. By minimizing the round trip delay, arbitration overhead and access latency is reduced, and loop bandwidth and overall performance is improved. Dynamic load sharing balances the load between the dual loops when using dual ported devices on the loops. Dynamic load sharing is accomplished by bypassing a given subset of devices off each loop to reduce round trip delay; monitoring traffic on the loops; and controlling which devices are attached to which loop in order to balance the load across the loops. Dynamic system configuration features provide an optimized system configuration on a discretely continuous basis, including implementing dynamic loop sizing, dynamic load sharing, and managing the interconnection of multiple loops and controllers.

    摘要翻译: 在光纤通道仲裁环路通信体系结构中,动态环路调整包括有选择地绕过环路中的操作设备端口,以最小化与环路尺寸相关的开销。 在具有多个环路的冗余系统中,系统通过循环中旁路端口的明智分配进行优化。 冗余没有减少。 通过绕过环路中的未使用或不需要的端口,环路的往返延迟明显缩短。 通过最小化往返延迟,减少了仲裁开销和访问延迟,提高了环路带宽和整体性能。 动态负载分担在环路上使用双端口设备时平衡双环路之间的负载。 动态负载分担通过绕过每个环路的给定子集来实现,以减少往返延迟; 监控环路上的流量; 并且控制哪些装置附接到哪个环路以平衡跨越环路的负载。 动态系统配置功能在离散连续的基础上提供优化的系统配置,包括实现动态环路大小,动态负载共享以及管理多个环路和控制器的互连。

    Contact probe storage sensor pod
    9.
    发明授权
    Contact probe storage sensor pod 失效
    接触探头存储传感器盒

    公开(公告)号:US07423954B2

    公开(公告)日:2008-09-09

    申请号:US10736753

    申请日:2003-12-17

    申请人: Robert G. Mejia

    发明人: Robert G. Mejia

    IPC分类号: G11B9/00

    摘要: An embodiment of a read mechanism used in a contact atomic resolution storage system, has a cantilever disposed with a medium which is movable relative to the cantilever. The cantilever has a probe which extends from the cantilever and which contacts a surface of the medium. A pod is formed on a side of the cantilever facing the medium and extends toward the media. A sensor element is formed on the pod so as to juxtapose the medium.

    摘要翻译: 在接触原子分辨率存储系统中使用的读机构的实施例具有悬臂,其布置有可相对于悬臂运动的介质。 悬臂具有从悬臂延伸并与介质表面接触的探针。 荚形成在面向介质的悬臂的一侧上,朝向介质延伸。 传感器元件形成在荚上,以使介质并列。

    Compensating for variations in the temperature of a probe of a storage device
    10.
    发明授权
    Compensating for variations in the temperature of a probe of a storage device 失效
    补偿存储设备探头的温度变化

    公开(公告)号:US07236446B2

    公开(公告)日:2007-06-26

    申请号:US10898122

    申请日:2004-07-23

    IPC分类号: G11B9/00

    CPC分类号: G11B9/1409 B82Y10/00

    摘要: A storage device includes a storage medium and a probe to form perturbations in the storage medium. The storage device further includes a circuit to cause heating of the probe to perform an access operation, the circuit to compensate for variations in a temperature of the probe in performing the access operation.

    摘要翻译: 存储装置包括存储介质和用于在存储介质中形成扰动的探针。 存储装置还包括用于使探针加热以执行访问操作的电路,该电路补偿在执行访问操作时探针温度的变化。