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公开(公告)号：US20080165573A1
公开(公告)日：2008-07-10
申请号：US11651157
申请日：2007-01-09
Applicant: Thomas Nirschl , Roger Cheek , Mark Lamorey , Ming-Hsiu Lee
Inventor： Thomas Nirschl , Roger Cheek , Mark Lamorey , Ming-Hsiu Lee
CPC classification number: G11C13/003 , G11C13/0004 , G11C2213/74 , G11C2213/79
Abstract: A memory includes a bit line and a phase change element. A first side of the phase change element is coupled to the bit line. The memory includes a first access device coupled to a second side of the phase change element and a second access device coupled to the second side of the phase change element. The memory includes a circuit for precharging the bit line and one of selecting only the first access device to program the phase change element to a first state and selecting both the first access device and the second access device to program the phase change element to a second state.
Abstract translation: 存储器包括位线和相变元件。 相变元件的第一侧耦合到位线。 存储器包括耦合到相变元件的第二侧的第一存取装置和耦合到相变元件的第二侧的第二存取装置。 存储器包括用于对位线进行预充电的电路和仅选择第一存取装置以将相变元件编程为第一状态的电路，并且选择第一存取装置和第二存取装置以将相变元件编程为第二 州。
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2.发明授权公开(公告)号：US08238149B2
公开(公告)日：2012-08-07
申请号：US12715802
申请日：2010-03-02
Applicant: Yen-Hao Shih , Ming-Hsiu Lee , Chao-I Wu , Hsiang-Lan Lung , Chung Hon Lam , Roger Cheek , Matthew J. Breitwisch , Bipin Rajendran
Inventor： Yen-Hao Shih , Ming-Hsiu Lee , Chao-I Wu , Hsiang-Lan Lung , Chung Hon Lam , Roger Cheek , Matthew J. Breitwisch , Bipin Rajendran
IPC: G11C11/00
CPC classification number: G11C13/0004 , G11C13/004 , G11C29/70 , G11C2213/79
Abstract: Phase change memory devices and methods for operating described herein are based on the discovery that, following an initial high current operation applied to a phase change memory cell to establish the high resistance reset state, the current-voltage (I-V) behavior of the memory cell under different bias voltages can be used to detect if the memory cell is a defect cell having poor data retention characteristics.
Abstract translation: 相位变化存储器件和这里描述的操作方法基于以下发现：在施加到相变存储器单元以建立高电阻复位状态的初始高电流操作之后，存储器单元的电流 - 电压（IV）行为 可以使用不同的偏置电压来检测存储器单元是否具有差的数据保留特性的缺陷单元。
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公开(公告)号：US07652914B2
公开(公告)日：2010-01-26
申请号：US11651157
申请日：2007-01-09
Applicant: Thomas Nirschl , Roger Cheek , Mark Lamorey , Ming-Hsiu Lee
Inventor： Thomas Nirschl , Roger Cheek , Mark Lamorey , Ming-Hsiu Lee
IPC: G11C11/00
CPC classification number: G11C13/003 , G11C13/0004 , G11C2213/74 , G11C2213/79
Abstract: A memory includes a bit line and a phase change element. A first side of the phase change element is coupled to the bit line. The memory includes a first access device coupled to a second side of the phase change element and a second access device coupled to the second side of the phase change element. The memory includes a circuit for precharging the bit line and one of selecting only the first access device to program the phase change element to a first state and selecting both the first access device and the second access device to program the phase change element to a second state.
Abstract translation: 存储器包括位线和相变元件。 相变元件的第一侧耦合到位线。 存储器包括耦合到相变元件的第二侧的第一存取装置和耦合到相变元件的第二侧的第二存取装置。 存储器包括用于对位线进行预充电的电路和仅选择第一存取装置以将相变元件编程为第一状态的电路，并且选择第一存取装置和第二存取装置以将相变元件编程为第二 州。
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公开(公告)号：US20100328995A1
公开(公告)日：2010-12-30
申请号：US12715802
申请日：2010-03-02
Applicant: YEN-HAO SHIH , Ming-Hsiu Lee , Chao-I Wu , Hsiang-Lan Lung , Chung Hon Lam , Roger Cheek , Matthew J. Breitwisch , Bipin Rajendran
Inventor： YEN-HAO SHIH , Ming-Hsiu Lee , Chao-I Wu , Hsiang-Lan Lung , Chung Hon Lam , Roger Cheek , Matthew J. Breitwisch , Bipin Rajendran
IPC: G11C11/00
CPC classification number: G11C13/0004 , G11C13/004 , G11C29/70 , G11C2213/79
Abstract: Phase change memory devices and methods for operating described herein are based on the discovery that, following an initial high current operation applied to a phase change memory cell to establish the high resistance reset state, the current-voltage (I-V) behavior of the memory cell under different bias voltages can be used to detect if the memory cell is a defect cell having poor data retention characteristics.
Abstract translation: 相位变化存储器件和这里描述的操作方法基于以下发现：在施加到相变存储器单元以建立高电阻复位状态的初始高电流操作之后，存储器单元的电流 - 电压（IV）行为 可以使用不同的偏置电压来检测存储器单元是否具有差的数据保留特性的缺陷单元。
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