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公开(公告)号：US5070332A
公开(公告)日：1991-12-03
申请号：US671219
申请日：1991-03-18
申请人： Roy S. Kaller , David M. Thomas
发明人： Roy S. Kaller , David M. Thomas
摘要： A subranging analog-to-digital converter (ADC) that comprises a biasing architecture including a single string of transistor current sources used to generate the reference digital-to-analog converter (DAC) bit currents, the low-resolution flash ADC reference ladder voltage, and the ADC bipolar offset voltage. The reference DAC resistors, low resolution voltage reference ladder resistors, error amplifier gain set resistors, and the bipolar offset resistors are all constructed from the same material and using the same physical construction, so that they match with high precision and track over process and temperature. In one embodiment, the low-resolution flash ADC is itself implemented as a two-step parallel subranging ADC, comprising a most-significant-bit reference ladder and a least-significant-bit reference ladder, and includes an internal flash DAC whose bit currents are also provided by the same single string of transistor current sources. In addition, a shunt resistor across the least-significant-bit reference ladder of the low-resolution flash ADC makes it possible to tie it in series directly to its most-significant-bit reference ladder using the same resistor material, thus providing inherent tracking of the reference voltages of the two ladders. Finally, a bias current compensation resistor network is provided on the input side of the flash ADC comparators to cancel input bias current errors.
摘要翻译： 一种包含模拟 - 数字转换器（ADC），包括偏置架构，包括用于产生参考数/模转换器（DAC）位电流的单串晶体管电流源，低分辨率闪存ADC参考梯形电压 ，和ADC双极性偏移电压。 参考DAC电阻，低分辨率电压参考梯形电阻，误差放大器增益设置电阻和双极性失调电阻都由相同的材料构成，并使用相同的物理结构，使其与高精度跟踪过程和温度匹配 。 在一个实施例中，低分辨率闪存ADC本身被实现为两级并行子阵列ADC，其包括最高有效位参考梯形图和最低有效位参考梯形图，并且包括内部闪存DAC，其位电流 也由相同的单串晶体管电流源提供。 此外，低分辨率闪存ADC的最低有效位参考梯形图之间的分流电阻可以使用相同的电阻材料直接与其最高有效位参考梯级串联，从而提供固有的跟踪 的两个梯子的参考电压。 最后，在闪存ADC比较器的输入侧提供偏置电流补偿电阻网络，以消除输入偏置电流误差。
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