Abstract:
A control circuit and a method for controlling a power converter are provided. The method for controlling the power converter includes the following steps. A detection signal is received from the secondary side of the power transformer and a first switching signal is generated in accordance with the detection signal. A second switching signal is generated in accordance with the first switching signal. A voltage signal is generated in accordance with the second switching signal. A comparison signal is generated in accordance with the first switching signal and the second switching signal. The voltage signal and the comparison signal are compared for outputting a comparison result. A gate signal is generated in accordance with the detection signal and the comparison result to control on and off states of a synchronization switch.
Abstract:
A control circuit and a method for controlling a power converter are provided. The method for controlling the power converter includes the following steps. A detection signal is received from the secondary side of the power transformer and a first switching signal is generated in accordance with the detection signal. A second switching signal is generated in accordance with the first switching signal. A voltage signal is generated in accordance with the second switching signal. A comparison signal is generated in accordance with the first switching signal and the second switching signal. The voltage signal and the comparison signal are compared for outputting a comparison result. A gate signal is generated in accordance with the detection signal and the comparison result to control on and off states of a synchronization switch.
Abstract:
A control circuit of an interleaved PFC power converter according to the present invention comprises a master switching control circuit, a slave switching control circuit, and a slave reference signal generator. The master switching control circuit generates a control signal and a first switching signal in response to an input voltage and a feedback signal. The first switching signal is utilized to control a first switch of the PFC power converter. The slave reference signal generator generates a slave control signal in response to a load condition of the PFC power converter and the control signal. The slave switching control circuit generates a second switching signal in response to the slave control signal. The slave control signal is utilized to control a second switch of the PFC power converter. The slave reference signal generator adjusts the control signal in response to the load condition for generating the slave control signal correspondingly. The slave control signal drives the slave switching control circuit to adjust the switching frequency of the second switch for reducing the switching loss.
Abstract:
A low-pass filter of the present invention comprises a plurality of filter units and a regulation unit. The filter units are coupled in series with each other and receive an input signal to filter the input signal for generating an output signal. The regulation unit is coupled to the filter units to regulate voltage levels of the filter units. The low-pass filter of the present invention can be integrated within the integrated circuit and reduce the prime cost.
Abstract:
A switching controller for parallel power converters is disclosed. The switching controller includes an input circuit coupled to an input terminal of the switching controller to receive an input signal. An integration circuit is coupled to the input circuit to generate an integration signal in response to the pulse width of the input signal. A control circuit generates a switching signal for switching the power converters. The switching signal is enabled in response to the enabling of the input signal. A programmable delay time is generated between the input signal and the switching signal. The pulse width of the switching signal is determined in response to the integration signal.
Abstract:
The present invention provides a power converter having a phase lock circuit for quasi-resonant soft switching. The power converter includes a first circuit coupled to the feedback signal to generate a switching signal for switching a switching device and regulating the output of the power converter. A second circuit is coupled to an auxiliary winding of the transformer for generating a voltage signal in response to the voltage of the transformer. A phase lock circuit generates a control signal to enable the switching signal in accordance with the voltage signal. The switching signal further turns on the switching device in response to a valley voltage across the switching device.
Abstract:
The switched charge multiplier-divider according to the present invention is constructed of CMOS devices. Capacitor charge theory is employed to implement the circuit of the switched charge multiplier-divider. The switched charge multiplier-divider includes an output capacitor and controls the voltage across the output capacitor, so that it is proportional to the product of the charge current and the charge-time interval. The switched charge multiplier-divider is ideal for use in the power factor correction (PFC) of switching mode power supplies. Potentially, it can also be applied to automatic gain control (AGC) circuits.
Abstract:
A controller for a power converter includes a clamping circuit, a switching circuit and a pulse generator. The clamping circuit is coupled to an input terminal of the controller for detecting a detection signal from a transformer. The switching circuit generates a switching signal to switch the transformer in response to the detection signal for regulating the power converter. A maximum level of the detection signal is clamped to be under a level of a threshold voltage during an off-period of the switching signal. Since the maximum level of the detection signal is clamped and the oscillating energy of the reflected signal is discharged, the speed of detecting the detection signal is increased. Therefore, the regulation of the primary-side controlled power converter can be improved accordingly.
Abstract:
A control circuit of an interleaved PFC power converter according to the present invention comprises a master switching control circuit, a slave switching control circuit, and a slave reference signal generator. The master switching control circuit generates a control signal and a first switching signal in response to an input voltage and a feedback signal. The first switching signal is utilized to control a first switch of the PFC power converter. The slave reference signal generator generates a slave control signal in response to a load condition of the PFC power converter and the control signal. The slave switching control circuit generates a second switching signal in response to the slave control signal. The slave control signal is utilized to control a second switch of the PFC power converter. The slave reference signal generator adjusts the control signal in response to the load condition for generating the slave control signal correspondingly. The slave control signal drives the slave switching control circuit to adjust the switching frequency of the second switch for reducing the switching loss.
Abstract:
A control circuit with protection circuit for power supply according to the present invention comprises a peak-detection circuit and a protection circuit. The peak-detection circuit detects an AC input voltage and generates a peak-detection signal. The protection circuit comprises an over-voltage protection circuit. The over-voltage protection circuit generates an over-voltage protection signal in response to the peak-detection signal. The protection circuit generates a reset signal to reduce the output of the power supply in response to the over-voltage protection signal. The present invention can protect the power supply in response to the AC input voltage effectively through the peak-detection circuit.