公开(公告)号：US08645878B1

公开(公告)日：2014-02-04

申请号：US13592122

申请日：2012-08-22

申请人： Lawrence T. Clark ,  Scott E. Thompson ,  Richard S. Roy ,  Samuel Leshner

发明人： Lawrence T. Clark ,  Scott E. Thompson ,  Richard S. Roy ,  Samuel Leshner

IPC分类号： G06F17/50

CPC分类号： H01L21/22 ,  G06F17/505 ,  H01L21/266 ,  H01L29/7816

摘要： Porting a first integrated circuit design targeted for implementation in a first semiconductor manufacturing process, and implementing a second circuit design in a second semiconductor manufacturing process wherein the electrical performance of the second integrated circuit meets or exceeds the requirements of the first integrated circuit design even if the threshold voltage targets of the second integrated circuit design are different from those of the first integrated circuit design; and wherein physical layouts, and in particular the gate-widths and gate-lengths of the transistors, of the first and second integrated circuit designs are the same or substantially the same. The second integrated circuit design, when fabricated in the second semiconductor manufacturing process and then operated, experiences less off-state transistor leakage current than does the first integrated circuit design, when fabricated in the first semiconductor manufacturing process, and then operated. Porting includes determining processing targets for the second semiconductor manufacturing process.

公开(公告)号：US08164359B2

公开(公告)日：2012-04-24

申请号：US12867352

申请日：2009-02-13

申请人： Samuel Leshner ,  Sarma Vrudhula

发明人： Samuel Leshner ,  Sarma Vrudhula

IPC分类号： H03K19/23

CPC分类号： H03K19/0813

摘要： Embodiments of a threshold logic element are provided. Preferably, embodiments of the threshold logic element discussed herein have low leakage power and high performance characteristics. In the preferred embodiment, the threshold logic element is a threshold logic latch (TLL). The TLL is a dynamically operated current-mode threshold logic cell that provides fast and efficient implementation of digital logic functions. The TLL can be operated synchronously or asynchronously and is fully compatible with standard Complementary Metal-Oxide-Semiconductor (CMOS) technology.

摘要翻译： 提供了阈值逻辑元件的实施例。 优选地，本文所讨论的阈值逻辑元件的实施例具有低泄漏功率和高性能特性。 在优选实施例中，阈值逻辑元件是阈值逻辑锁存器（TLL）。 TLL是一种动态操作的电流模式阈值逻辑单元，可提供快速有效的数字逻辑功能实现。 TLL可以同步或异步操作，并且与标准互补金属氧化物半导体（CMOS）技术完全兼容。

公开(公告)号：US20100321061A1

公开(公告)日：2010-12-23

申请号：US12867352

申请日：2009-02-13

申请人： Samuel Leshner ,  Sarma Vrudhula

发明人： Samuel Leshner ,  Sarma Vrudhula

IPC分类号： H03K19/23

CPC分类号： H03K19/0813

摘要： Embodiments of a threshold logic element are provided. Preferably, embodiments of the threshold logic element discussed herein have low leakage power and high performance characteristics. In the preferred embodiment, the threshold logic element is a threshold logic latch (TLL). The TLL is a dynamically operated current-mode threshold logic cell that provides fast and efficient implementation of digital logic functions. The TLL can be operated synchronously or asynchronously and is fully compatible with standard Complementary Metal-Oxide-Semiconductor (CMOS) technology.

摘要翻译： 提供了阈值逻辑元件的实施例。 优选地，本文所讨论的阈值逻辑元件的实施例具有低泄漏功率和高性能特性。 在优选实施例中，阈值逻辑元件是阈值逻辑锁存器（TLL）。 TLL是一种动态操作的电流模式阈值逻辑单元，可提供快速有效的数字逻辑功能实现。 TLL可以同步或异步操作，并且与标准互补金属氧化物半导体（CMOS）技术完全兼容。