公开(公告)号：US08797251B2

公开(公告)日：2014-08-05

申请号：US13216543

申请日：2011-08-24

申请人： Jinwook Yang ,  Sang Jae Yeo

发明人： Jinwook Yang ,  Sang Jae Yeo

IPC分类号： G09G3/36

CPC分类号： G09G3/3266 ,  G09G3/3674 ,  G09G2310/0286

摘要： Embodiments may be directed to a gate driving circuit. The gate driving circuit includes a pre-charge unit, a pull-up unit, a boosting unit, and a discharge unit. The pre-charge unit pre-charges a first node in response to a first input signal. The pull-up unit outputs a first clock signal as a gate driving signal in response to a first node signal of the first node. The boosting unit boosts the first node signal of the first node in response to the first node signal and the first clock signal. The discharge unit discharges the first node to a gate-off voltage level in response to a second input signal and a second clock signal.

摘要翻译： 实施例可以针对门驱动电路。 栅极驱动电路包括预充电单元，上拉单元，升压单元和放电单元。 预充电单元响应于第一输入信号对第一节点进行预充电。 上拉单元响应于第一节点的第一节点信号输出第一时钟信号作为门驱动信号。 升压单元响应于第一节点信号和第一时钟信号来提升第一节点的第一节点信号。 放电单元响应于第二输入信号和第二时钟信号将第一节点放电到栅极截止电压电平。

公开(公告)号：US20130043479A1

公开(公告)日：2013-02-21

申请号：US13328094

申请日：2011-12-16

申请人： Tae-Jin KIM ,  Sang-Jae Yeo ,  Dae-Sung Choi

发明人： Tae-Jin KIM ,  Sang-Jae Yeo ,  Dae-Sung Choi

IPC分类号： H01L29/786 ,  H01L21/336 ,  H01L29/04

CPC分类号： H01L29/78696 ,  H01L29/42384

摘要： A thin film transistor substrate includes a substrate, a gate electrode on the substrate, an active layer on or below the gate electrode (the active layer at least partially overlapping the gate electrode) including a first active region and a second active region, the first active region and the second active region facing each other and extending beyond the gate electrode, a source electrode electrically connected to the first active region and a drain electrode electrically connected to the second active region, wherein the active layer includes a recess region which is at least partially recessed from a surface of the active layer facing the gate electrode, and the recess region includes a portion extending between the first active region and the second active region.

摘要翻译： 薄膜晶体管衬底包括衬底，衬底上的栅电极，在包括第一有源区和第二有源区的栅电极（活性层至少部分与栅电极重叠的）上或之下的有源层，第一 有源区和第二有源区彼此相对并延伸超过栅电极，电连接到第一有源区的源极和与第二有源区电连接的漏电极，其中有源层包括位于 从有源层的面向栅电极的表面至少部分地凹入，并且凹陷区域包括在第一有源区和第二有源区之间延伸的部分。

公开(公告)号：US20120182050A1

公开(公告)日：2012-07-19

申请号：US13216543

申请日：2011-08-24

申请人： Jinwook Yang ,  Sang Jae Yeo

发明人： Jinwook Yang ,  Sang Jae Yeo

IPC分类号： G05F3/08

CPC分类号： G09G3/3266 ,  G09G3/3674 ,  G09G2310/0286

摘要： Embodiments may be directed to a gate driving circuit. The gate driving circuit includes a pre-charge unit, a pull-up unit, a boosting unit, and a discharge unit. The pre-charge unit pre-charges a first node in response to a first input signal. The pull-up unit outputs a first clock signal as a gate driving signal in response to a first node signal of the first node. The boosting unit boosts the first node signal of the first node in response to the first node signal and the first clock signal. The discharge unit discharges the first node to a gate-off voltage level in response to a second input signal and a second clock signal.

摘要翻译： 实施例可以针对门驱动电路。 栅极驱动电路包括预充电单元，上拉单元，升压单元和放电单元。 预充电单元响应于第一输入信号对第一节点进行预充电。 上拉单元响应于第一节点的第一节点信号输出第一时钟信号作为门驱动信号。 升压单元响应于第一节点信号和第一时钟信号来提升第一节点的第一节点信号。 放电单元响应于第二输入信号和第二时钟信号将第一节点放电到栅极截止电压电平。

公开(公告)号：US20100109996A1

公开(公告)日：2010-05-06

申请号：US12557008

申请日：2009-09-10

申请人： Moon-Chul PARK ,  Sang-Jae YEO

发明人： Moon-Chul PARK ,  Sang-Jae YEO

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G2310/0291 ,  G09G2310/061 ,  G09G2330/021

摘要： There is provided a method of driving a gate line, a gate drive circuit for performing the method, and a display apparatus having the gate drive circuit. In the method, a plurality of gate signals, generated from a plurality of shift registers connected to a plurality of gate lines, is applied to the gate lines. An output of the gate signals is blocked during a vertical blanking interval, and then a gate off voltage is applied to the gate lines. Therefore, an output signal of the gate drive circuit may maintain a gate off voltage during a vertical blanking interval in which a clock signal is not applied to a gate drive circuit.

摘要翻译： 提供了驱动栅极线的方法，用于执行该方法的栅极驱动电路和具有栅极驱动电路的显示装置。 在该方法中，从连接到多条栅极线的多个移位寄存器产生的多个栅极信号被施加到栅极线。 在垂直消隐间隔期间，门信号的输出被阻断，然后将栅极截止电压施加到栅极线。 因此，在时钟信号不施加到栅极驱动电路的垂直消隐间隔期间，栅极驱动电路的输出信号可以保持栅极截止电压。

公开(公告)号：US20100053138A1

公开(公告)日：2010-03-04

申请号：US12365347

申请日：2009-02-04

申请人： Chang-Jin IM ,  Moon-Chul Park ,  Sang-Jae Yeo

发明人： Chang-Jin IM ,  Moon-Chul Park ,  Sang-Jae Yeo

IPC分类号： G06F3/038 ,  G09G3/34

CPC分类号： G09G3/3614 ,  G09G3/3677 ,  G09G3/3696 ,  G09G2310/06

摘要： In a display apparatus and a method of driving the display apparatus, data voltages, which correspond to image data, are supplied to data lines to drive a plurality of pixels arranged in pixel areas defined by a plurality of gate lines and data lines, and gate signals are sequentially supplied to gate lines. The gate signals are maintained at a level of gate on voltage such that the data voltages of the data lines are supplied to corresponding pixels during a scan period, and alternately have a first voltage level and a second voltage level in synchronization with a common voltage during a non-scan period.

摘要翻译： 在显示装置和驱动显示装置的方法中，对应于图像数据的数据电压被提供给数据线以驱动布置在由多条栅极线和数据线限定的像素区域中的多个像素，并且栅极 信号依次提供给栅极线。 栅极信号保持在栅极导通电压的电平，使得在扫描周期期间数据线的数据电压被提供给相应的像素，并且在公共电压期间交替地具有与公共电压同步的第一电压电平和第二电压电平 非扫描期间。

公开(公告)号：US08698787B2

公开(公告)日：2014-04-15

申请号：US12044796

申请日：2008-03-07

申请人： Chang-Jin Im ,  Hisashi Kimura ,  Sang-Jae Yeo ,  Moon-Chul Park

发明人： Chang-Jin Im ,  Hisashi Kimura ,  Sang-Jae Yeo ,  Moon-Chul Park

IPC分类号： G09G5/00 ,  G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/3696 ,  G09G2320/0276

摘要： A method for generating a gamma voltage comprising, a first low voltage and a first high voltage having a first voltage range between the first low voltage and the first high voltage are divided into a plurality of gamma voltages of a first polarity during a first interval. A second low voltage and a second high voltage having a second voltage range between the second low voltage and the second high voltage are divided into a plurality of gamma voltages of a second polarity during a second interval.

摘要翻译： 一种用于产生伽马电压的方法，包括在第一间隔期间将具有第一低电压和第一高电压之间的第一电压范围的第一低电压和第一高电压分成多个第一极性的伽马电压。 具有第二低电压和第二高电压之间的第二电压范围的第二低电压和第二高电压在第二间隔期间被分成多个第二极性的伽马电压。

公开(公告)号：US08279210B2

公开(公告)日：2012-10-02

申请号：US12365347

申请日：2009-02-04

申请人： Chang-Jin Im ,  Moon-Chul Park ,  Sang-Jae Yeo

发明人： Chang-Jin Im ,  Moon-Chul Park ,  Sang-Jae Yeo

IPC分类号： G06F3/038 ,  G09G5/00

CPC分类号： G09G3/3614 ,  G09G3/3677 ,  G09G3/3696 ,  G09G2310/06

摘要： In a display apparatus and a method of driving the display apparatus, data voltages, which correspond to image data, are supplied to data lines to drive a plurality of pixels arranged in pixel areas defined by a plurality of gate lines and data lines, and gate signals are sequentially supplied to gate lines. The gate signals are maintained at a level of gate on voltage such that the data voltages of the data lines are supplied to corresponding pixels during a scan period, and alternately have a first voltage level and a second voltage level in synchronization with a common voltage during a non-scan period.

摘要翻译： 在显示装置和驱动显示装置的方法中，对应于图像数据的数据电压被提供给数据线以驱动布置在由多条栅极线和数据线限定的像素区域中的多个像素，并且栅极 信号依次提供给栅极线。 栅极信号保持在栅极导通电压的水平，使得在扫描周期期间数据线的数据电压被提供给相应的像素，并且在公共电压期间交替地具有与公共电压同步的第一电压电平和第二电压电平 非扫描期间。

公开(公告)号：US20120127147A1

公开(公告)日：2012-05-24

申请号：US13051118

申请日：2011-03-18

申请人： Jin-Wook Yang ,  Sang-Jae Yeo

发明人： Jin-Wook Yang ,  Sang-Jae Yeo

IPC分类号： G09G3/36 ,  G09G5/00

CPC分类号： G09G3/3688 ,  G09G3/3648 ,  G09G3/3655 ,  G09G2300/0814 ,  G09G2310/0251 ,  G09G2320/0209

摘要： A liquid crystal display having: a liquid crystal display panel comprising a plurality of pixels; a data driver applying a data voltage to a plurality of data lines connected to the plurality of pixels; an initial voltage driver applying an initial voltage to the plurality of data lines before the data voltage is applied; and a boost driver applying a boost voltage to a plurality of boost lines connected to the plurality of pixels and boosting voltages of the plurality of pixels to which the data voltage is applied. Crosstalk caused by noise generated in a boost line can be reduced by coupling with a data line, and an ALS driving scheme can be applied to a liquid crystal display having high resolution.

摘要翻译： 一种液晶显示器，具有：具有多个像素的液晶显示面板; 将数据电压施加到连接到所述多个像素的多个数据线的数据驱动器; 初始电压驱动器，在施加所述数据电压之前向所述多条数据线施加初始电压; 以及升压驱动器对连接到所述多个像素的多个升压线路施加升压电压，并且对所述多个像素施加数据电压的升压电压。 通过与数据线耦合可以降低由升压线产生的噪声引起的串扰，并且可以将ALS驱动方案应用于具有高分辨率的液晶显示器。

公开(公告)号：US09013390B2

公开(公告)日：2015-04-21

申请号：US13292342

申请日：2011-11-09

申请人： Jin-Wook Yang ,  Sang-Jae Yeo

发明人： Jin-Wook Yang ,  Sang-Jae Yeo

IPC分类号： G09G3/36 ,  G11C19/18 ,  G11C19/28

CPC分类号： G11C19/184 ,  G09G3/3677 ,  G09G2310/0286 ,  G11C19/28

摘要： A gate driver includes stages coupled to each other and outputting gate signals. Each stage includes a node driver, a pull-up unit, a node controller, a first node stabilizer, and a pull-down unit. The node driver outputs a first voltage or a second voltage to a first node in response to a first or a second input signal. The pull-up unit pulls an output terminal to high in response to a voltage of the first node. The node controller outputs an on-voltage to a second node in response to a first clock signal from a third node or a second clock signal from a fourth node. The first node stabilizer stabilizes the first node to an off-voltage in response to a voltage of the second node. The pull-down unit pulls the output terminal to low in response to the voltage of the second node or the second input signal.

摘要翻译： 栅极驱动器包括彼此耦合并输出栅极信号的级。 每个级包括节点驱动器，上拉单元，节点控制器，第一节点稳定器和下拉单元。 响应于第一或第二输入信号，节点驱动器向第一节点输出第一电压或第二电压。 上拉单元响应于第一节点的电压将输出端拉高。 响应于来自第三节点的第一时钟信号或来自第四节点的第二时钟信号，节点控制器向第二节点输出导通电压。 第一节点稳定器响应于第二节点的电压将第一节点稳定为截止电压。 下拉单元响应于第二节点或第二输入信号的电压将输出端拉低。

公开(公告)号：US20130027377A1

公开(公告)日：2013-01-31

申请号：US13292342

申请日：2011-11-09

申请人： Jin-Wook Yang ,  Sang-Jae Yeo

发明人： Jin-Wook Yang ,  Sang-Jae Yeo

IPC分类号： G09G5/00 ,  H03K3/00

CPC分类号： G11C19/184 ,  G09G3/3677 ,  G09G2310/0286 ,  G11C19/28

摘要： A gate driver includes stages coupled to each other and outputting gate signals. Each stage includes a node driver, a pull-up unit, a node controller, a first node stabilizer, and a pull-down unit. The node driver outputs a first voltage or a second voltage to a first node in response to a first or a second input signal. The pull-up unit pulls an output terminal to high in response to a voltage of the first node. The node controller outputs an on-voltage to a second node in response to a first clock signal from a third node or a second clock signal from a fourth node. The first node stabilizer stabilizes the first node to an off-voltage in response to a voltage of the second node. The pull-down unit pulls the output terminal to low in response to the voltage of the second node or the second input signal.

摘要翻译： 栅极驱动器包括彼此耦合并输出栅极信号的级。 每个级包括节点驱动器，上拉单元，节点控制器，第一节点稳定器和下拉单元。 响应于第一或第二输入信号，节点驱动器向第一节点输出第一电压或第二电压。 上拉单元响应于第一节点的电压将输出端拉高。 响应于来自第三节点的第一时钟信号或来自第四节点的第二时钟信号，节点控制器向第二节点输出导通电压。 第一节点稳定器响应于第二节点的电压将第一节点稳定为截止电压。 下拉单元响应于第二节点或第二输入信号的电压将输出端拉低。