摘要:
The present invention relates to htSNPs for determining a genotype of cytochrome P450 1A2 (CYP1A2), 2A6 (CYP2A6) and 2D6 (CYP2D6), PXR and UDP-glucuronosyltransferase 1a (UGT1A) genes and a gene chip using the same, and more particularly, to a selection method of htSNPs for determining a haplotype of human CYP1A2, CYP2A6, CYP2D6, PXR and UGT1A genes, a method of determining a genotype of the genes by using the htSNPs and a gene chip therefor.
摘要:
The present invention relates to htSNPs for determining a genotype of cytochrome P450 1A2 (CYP1A2), 2A6 (CYP2A6) and 2D6 (CYP2D6), PXR and UDP-glucuronosyltransferase 1a (UGT1A) genes and a gene chip using the same, and more particularly, to a selection method of htSNPs for determining a haplotype of human CYP1A2, CYP2A6, CYP2D6, PXR and UGT1A genes, a method of determining a genotype of the genes by using the htSNPs and a gene chip therefor.
摘要:
A method for cleaning a wafer by removing residues from the surface of a wafer where metals are reacted to form compounds. The cleaning method may include first residue from predetermined areas of the wafer (e.g., uppermost surface of the gate electrode and/or source/drain regions where suicides are formed) using at least one selected from a sulfuric acid cleaning solution, a first mixed cleaning solution and a second mixed cleaning solution, then removing oxide films from the predetermined areas using a diluted hydrofluoric acid cleaning solution, and then removing a second residue derived from the removal of the oxide films using the first mixed cleaning solution. Accordingly, the method efficiently removes the first and second residues left on the surfaces of the predetermined areas.
摘要:
Provided is a trench line for the disconnection of a solar cell, capable of effectively insulating a semiconductor layer at an upper portion of a substrate from a semiconductor layer at a side portion of the substrate and improving disconnection reliability. The trench line for the disconnection of a solar cell according to the disclosure which electrically insulates the semiconductor layers formed at the upper portion and the side portion of the substrate of the solar cell from each other, includes a plurality of unit trench lines which are disposed to intersect at an upper surface of the substrate of the solar cell. Intersecting points of the intersecting unit trench lines are positioned on the unit trench lines and are positioned at points spaced inwardly from starting points or ending points of the unit trench lines by a predetermined distance.
摘要:
A method of manufacturing a semiconductor device including forming a first conductive-type buried layer in a substrate; forming a first conductive-type drift area on the first conductive-type buried layer; forming a gate insulating layer and gate electrodes by selectively removing the first conductive-type drift area; forming a first oxide layer on the substrate and gate electrodes; implanting second conductive-type impurity ions into the substrate; forming a nitride layer on the first oxide layer; forming a second conductive-type well by diffusing the second conductive-type impurity ions while forming a second oxide layer; removing the nitride layer, the second oxide layer, and portions of the first oxide layer; forming first conductive-type source areas at sides of the gate electrode(s); forming a dielectric layer on the oxide layer; forming a trench in the dielectric layer and the oxide layer; forming a source contact in the trench; and forming a drain.
摘要:
The present invention relates to htSNPs for determining a genotype of cytochrome P450 1A2 (CYP1A2), 2A6 (CYP2A6) and 2D6 (CYP2D6), PXR and UDP-glucuronosyltransferase Ia (UGT1A) genes and a gene chip using the same, and more particularly, to a selection method of htSNPs for determining a haplotype of human CYP1A2, CYP2A6, CYP2D6, PXR and UGT1A genes, a method of determining a genotype of the genes by using the htSNPs and a gene chip therefor.
摘要:
A method of manufacturing a semiconductor device including forming a first conductive-type buried layer in a substrate; forming a first conductive-type drift area on the first conductive-type buried layer; forming a gate insulating layer and gate electrodes by selectively removing the first conductive-type drift area; forming a first oxide layer on the substrate and gate electrodes; implanting second conductive-type impurity ions into the substrate; forming a nitride layer on the first oxide layer; forming a second conductive-type well by diffusing the second conductive-type impurity ions while forming a second oxide layer; removing the nitride layer, the second oxide layer, and portions of the first oxide layer; forming first conductive-type source areas at sides of the gate electrode(s); forming a dielectric layer on the oxide layer; forming a trench in the dielectric layer and the oxide layer; forming a source contact in the trench; and forming a drain.