Systems and methods for low latency media defect detection

    公开(公告)号:US08875005B2

    公开(公告)日:2014-10-28

    申请号:US13368599

    申请日:2012-02-08

    IPC分类号: G06F11/00

    摘要: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.

    Systems and Methods for Reduced Latency Loop Correction
    2.
    发明申请
    Systems and Methods for Reduced Latency Loop Correction 有权
    减少延迟循环校正的系统和方法

    公开(公告)号:US20130238944A1

    公开(公告)日:2013-09-12

    申请号:US13415430

    申请日:2012-03-08

    IPC分类号: G06F11/07

    CPC分类号: H03J7/04

    摘要: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes: a data detector circuit, a low latency detection circuit, and an error calculation circuit. The data detector circuit is operable to perform a data detection process on a first signal derived from a data input to yield a detected output, and to provide a loop error as a difference between the detected output and the first signal. The low latency detection circuit operable to process a second signal derived from the data input to yield a fast detector output, and to provide a generated error as a difference between the fast detector output and the second signal. The error calculation circuit is operable to calculate an error value based at least in part on the generated error and the loop error.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,讨论了包括数据检测器电路,低延迟检测电路和误差计算电路的数据处理电路。 数据检测器电路可操作以对从数据输入导出的第一信号执行数据检测处理,以产生检测到的输出,并提供循环误差作为检测到的输出与第一信号之间的差。 低延迟检测电路可操作以处理从数据输入得到的第二信号以产生快速检测器输出,并且将产生的误差提供为快速检测器输出和第二信号之间的差。 误差计算电路可操作以至少部分地基于所产生的误差和环路误差来计算误差值。

    Systems and methods for defective media region identification
    3.
    发明授权
    Systems and methods for defective media region identification 有权
    缺陷介质区域识别的系统和方法

    公开(公告)号:US07952824B2

    公开(公告)日:2011-05-31

    申请号:US12399679

    申请日:2009-03-06

    IPC分类号: G11B27/36

    CPC分类号: G11B27/36 G11B2220/2516

    摘要: Various embodiments of the present invention provide systems and methods for storage medium flaw detection. For example, some embodiments provide flaw detection systems that include an input circuit, a data processing circuit and a defect detection circuit. The input circuit is operable to receive an input signal and to provide a filtered output. The data processing circuit is operable to receive the filtered output and to compute a difference between the filtered output and an expected output, and the defect detection circuit receives the difference between the filtered output and the expected output and compares a derivative of the difference with a threshold value, and asserts a defect signal when a magnitude of the derivative of the difference exceeds a threshold value.

    摘要翻译: 本发明的各种实施例提供了用于存储介质探伤的系统和方法。 例如,一些实施例提供了包括输入电路,数据处理电路和缺陷检测电路的探伤系统。 输入电路可操作以接收输入信号并提供滤波输出。 数据处理电路可操作以接收滤波后的输出并计算滤波后的输出与预期输出之间的差值,而缺陷检测电路接收滤波后的输出与预期输出之间的差值,并将差值的导数与 并且当差分的导数的大小超过阈值时,断言缺陷信号。

    Systems and Methods for Memory Efficient Signal and Noise Estimation
    4.
    发明申请
    Systems and Methods for Memory Efficient Signal and Noise Estimation 有权
    用于存储器高效信号和噪声估计的系统和方法

    公开(公告)号:US20100088357A1

    公开(公告)日:2010-04-08

    申请号:US12247378

    申请日:2008-10-08

    IPC分类号: G06F7/38 G06F7/50 G06F7/52

    CPC分类号: H04B17/327 H04B17/26

    摘要: Various embodiments of the present invention provide systems and methods for estimating signal and noise powers in a received signal set. For example, one embodiment of the present invention provides a method for determining signal power and noise power. The method uses a storage medium that includes a Na×Nw data pattern. The Na×Nw data pattern includes Na bits repeated Nw times. Both Na and Nw are each greater than one. The methods further include performing an initial read of the Na×Nw data pattern, which is stored to a first register. Nr subsequent reads of the Na×Nw data pattern are each processed by: performing a subsequent read of the Na×Nw data pattern, and performing a difference calculation using the initial read of the Na×Nw data pattern and the subsequent read of the Na×Nw data pattern and resulting in the calculation of a difference vector that is stored to a second register; and performing a difference accumulation calculation to generate an accumulation vector which is stored to a third register. Based at least in part on the stored Na×Nw data pattern and the stored difference vector, an electronics noise power is calculated.

    摘要翻译: 本发明的各种实施例提供了用于估计接收信号组中的信号和噪声功率的系统和方法。 例如,本发明的一个实施例提供了一种用于确定信号功率和噪声功率的方法。 该方法使用包括Na×Nw数据模式的存储介质。 Na×Nw数据模式包括重复N次的Na比特。 Na和Nw都大于1。 所述方法还包括执行存储到第一寄存器的Na×Nw数据模式的初始读取。 N×Nw数据模式的后续读取各自通过以下处理:执行Na×Nw数据模式的后续读取,并且使用Na×Nw数据模式的初始读取和随后的Na读数执行差分计算 ×Nw数据模式,并导致存储到第二寄存器的差矢量的计算; 以及执行差积累计算,以产生存储到第三寄存器的累加向量。 至少部分地基于存储的Na×Nw数据模式和存储的差分矢量,计算电子噪声功率。

    Systems and methods for reduced latency loop correction
    5.
    发明授权
    Systems and methods for reduced latency loop correction 有权
    用于减少等待时间循环校正的系统和方法

    公开(公告)号:US08610608B2

    公开(公告)日:2013-12-17

    申请号:US13415430

    申请日:2012-03-08

    IPC分类号: H03M1/06

    CPC分类号: H03J7/04

    摘要: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes: a data detector circuit, a low latency detection circuit, and an error calculation circuit. The data detector circuit is operable to perform a data detection process on a first signal derived from a data input to yield a detected output, and to provide a loop error as a difference between the detected output and the first signal. The low latency detection circuit operable to process a second signal derived from the data input to yield a fast detector output, and to provide a generated error as a difference between the fast detector output and the second signal. The error calculation circuit is operable to calculate an error value based at least in part on the generated error and the loop error.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,讨论了包括数据检测器电路,低延迟检测电路和误差计算电路的数据处理电路。 数据检测器电路可操作以对从数据输入导出的第一信号执行数据检测处理,以产生检测到的输出,并提供循环误差作为检测到的输出与第一信号之间的差。 低延迟检测电路可操作以处理从数据输入得到的第二信号以产生快速检测器输出,并且将产生的误差提供为快速检测器输出和第二信号之间的差。 误差计算电路可操作以至少部分地基于所产生的误差和环路误差来计算误差值。

    Low Latency Multi-Detector Noise Cancellation
    6.
    发明申请
    Low Latency Multi-Detector Noise Cancellation 有权
    低延迟多检测器噪声消除

    公开(公告)号:US20130007570A1

    公开(公告)日:2013-01-03

    申请号:US13171615

    申请日:2011-06-29

    IPC分类号: G06F11/16

    摘要: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is disclosed that includes first and second data detectors and an error cancellation circuit. The first data detector is operable to perform a data detection process on a first signal derived from a data input to yield a detected output. The second data detector circuit is operable to perform a data detection process on a second signal derived from the data input to yield a second detected output. The error cancellation circuit is operable to combine a first error signal derived from the detected output with a second error signal derived from the second detected output to yield a feedback signal. The feedback signal is operable to modify the data input during a subsequent period.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,公开了一种包括第一和第二数据检测器和误差消除电路的数据处理电路。 第一数据检测器可操作以对从数据输入导出的第一信号执行数据检测处理,以产生检测到的输出。 第二数据检测器电路可操作以对从数据输入导出的第二信号执行数据检测处理,以产生第二检测输出。 误差消除电路可操作以将从检测到的输出导出的第一误差信号与从第二检测输出导出的第二误差信号组合以产生反馈信号。 反馈信号可操作以在随后的时段内修改数据输入。

    Systems and methods for low latency media defect detection
    7.
    发明授权
    Systems and methods for low latency media defect detection 有权
    用于低延迟介质缺陷检测的系统和方法

    公开(公告)号:US08949701B2

    公开(公告)日:2015-02-03

    申请号:US13368599

    申请日:2012-02-08

    IPC分类号: G06F11/00

    摘要: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.

    摘要翻译: 本发明的各种实施例提供了用于介质缺陷检测的系统和方法。 例如,公开了一种媒体缺陷检测系统,其包括从介质导出的数据输入,快速包络计算电路,其接收数据输入并且基于数据输入提供快速衰减包络值;慢包络计算电路,其接收 数据输入并基于数据输入提供慢衰减包络值,以及介质缺陷检测电路。 媒体缺陷检测电路接收慢衰减包络值和快速衰减包络值,计算快速衰减包络值与慢衰减包络值的比值,并至少部分地基于比较来确定缺陷输出 比值到缺陷阈值。

    Systems and methods for memory efficient signal and noise estimation
    8.
    发明授权
    Systems and methods for memory efficient signal and noise estimation 有权
    用于存储器高效信号和噪声估计的系统和方法

    公开(公告)号:US09281908B2

    公开(公告)日:2016-03-08

    申请号:US12247378

    申请日:2008-10-08

    CPC分类号: H04B17/327 H04B17/26

    摘要: Various embodiments of the present invention provide systems and methods for estimating signal and noise powers in a received signal set. For example, one embodiment of the present invention provides a method for determining signal power and noise power. The method uses a storage medium that includes a Na×Nw data pattern. The Na×Nw data pattern includes Na bits repeated Nw times. Both Na and Nw are each greater than one. The methods further include performing an initial read of the Na×Nw data pattern, which is stored to a first register. Nr subsequent reads of the Na×Nw data pattern are each processed by: performing a subsequent read of the Na×Nw data pattern, and performing a difference calculation using the initial read of the Na×Nw data pattern and the subsequent read of the Na×Nw data pattern and resulting in the calculation of a difference vector that is stored to a second register; and performing a difference accumulation calculation to generate an accumulation vector which is stored to a third register. Based at least in part on the stored Na×Nw data pattern and the stored difference vector, an electronics noise power is calculated.

    摘要翻译: 本发明的各种实施例提供了用于估计接收信号组中的信号和噪声功率的系统和方法。 例如,本发明的一个实施例提供了一种用于确定信号功率和噪声功率的方法。 该方法使用包括Na×Nw数据模式的存储介质。 Na×Nw数据模式包括重复N次的Na比特。 Na和Nw都大于1。 所述方法还包括执行存储到第一寄存器的Na×Nw数据模式的初始读取。 N×Nw数据模式的后续读取各自通过以下处理:执行Na×Nw数据模式的后续读取,并且使用Na×Nw数据模式的初始读取和随后的Na读数执行差分计算 ×Nw数据模式,并导致存储到第二寄存器的差矢量的计算; 以及执行差积累计算,以产生存储到第三寄存器的累加向量。 至少部分地基于存储的Na×Nw数据模式和存储的差分矢量,计算电子噪声功率。

    Systems and Methods for Low Latency Media Defect Detection
    9.
    发明申请
    Systems and Methods for Low Latency Media Defect Detection 有权
    低延迟介质缺陷检测系统与方法

    公开(公告)号:US20100074078A1

    公开(公告)日:2010-03-25

    申请号:US12236148

    申请日:2008-09-23

    IPC分类号: G11B5/58

    摘要: Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.

    摘要翻译: 本发明的各种实施例提供了用于介质缺陷检测的系统和方法。 例如,公开了一种媒体缺陷检测系统,其包括从介质导出的数据输入,快速包络计算电路,其接收数据输入并且基于数据输入提供快速衰减包络值;慢包络计算电路,其接收 数据输入并基于数据输入提供慢衰减包络值,以及介质缺陷检测电路。 媒体缺陷检测电路接收慢衰减包络值和快速衰减包络值,计算快速衰减包络值与慢衰减包络值的比值,并至少部分地基于比较来确定缺陷输出 比值到缺陷阈值。

    Low latency multi-detector noise cancellation
    10.
    发明授权
    Low latency multi-detector noise cancellation 有权
    低延迟多检测器噪声消除

    公开(公告)号:US08862972B2

    公开(公告)日:2014-10-14

    申请号:US13171615

    申请日:2011-06-29

    IPC分类号: H03M13/00 G11B20/10

    摘要: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is disclosed that includes first and second data detectors and an error cancellation circuit. The first data detector is operable to perform a data detection process on a first signal derived from a data input to yield a detected output. The second data detector circuit is operable to perform a data detection process on a second signal derived from the data input to yield a second detected output. The error cancellation circuit is operable to combine a first error signal derived from the detected output with a second error signal derived from the second detected output to yield a feedback signal. The feedback signal is operable to modify the data input during a subsequent period.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,公开了一种包括第一和第二数据检测器和误差消除电路的数据处理电路。 第一数据检测器可操作以对从数据输入导出的第一信号执行数据检测处理,以产生检测到的输出。 第二数据检测器电路可操作以对从数据输入导出的第二信号执行数据检测处理,以产生第二检测输出。 误差消除电路可操作以将从检测到的输出导出的第一误差信号与从第二检测输出导出的第二误差信号组合以产生反馈信号。 反馈信号可操作以在随后的时段内修改数据输入。