公开(公告)号：US08517769B1

公开(公告)日：2013-08-27

申请号：US13422295

申请日：2012-03-16

申请人： Sean X. Lin ,  Ming He ,  Xunyuan Zhang ,  Larry Zhao

发明人： Sean X. Lin ,  Ming He ,  Xunyuan Zhang ,  Larry Zhao

IPC分类号： H01L21/4763 ,  H01L21/00

CPC分类号： H01L21/76879 ,  H01L21/76861 ,  H01L21/76864 ,  H01L21/76865 ,  H01L21/76874 ,  H01L2924/0002

摘要： Disclosed herein are various methods of forming copper-based conductive structures on integrated circuit devices. In one example, the method includes the steps of forming a trench/via in a layer of insulating material, forming a copper-based seed layer above the layer of insulating material and in the trench/via, performing a heating process on the copper-based seed layer to increase an amount of the copper-based seed layer positioned proximate a bottom of the trench/via, performing an etching process on said copper-based seed layer and performing an electroless copper deposition process to fill the trench/via with a copper-based material.

摘要翻译： 这里公开了在集成电路器件上形成铜基导电结构的各种方法。 在一个示例中，该方法包括以下步骤：在绝缘材料层中形成沟槽/通孔，在绝缘材料层上方和沟槽/通孔中形成铜基种子层，在铜 - 以增加位于沟槽/通孔的底部附近的铜基种子层的量，对所述铜基种子层进行蚀刻工艺，并执行无电镀铜沉积工艺以填充沟槽/通孔 铜基材料。

公开(公告)号：US08673766B2

公开(公告)日：2014-03-18

申请号：US13476692

申请日：2012-05-21

申请人： Sean X. Lin ,  Ming He ,  Xunyuan Zhang ,  Larry Zhao

发明人： Sean X. Lin ,  Ming He ,  Xunyuan Zhang ,  Larry Zhao

IPC分类号： H01L21/4763

CPC分类号： H01L21/76874 ,  H01L21/76843 ,  H01L21/76865 ,  H01L21/76879

摘要： Disclosed herein are various methods of forming copper-based conductive structures on integrated circuit devices. In one example, the method includes forming a trench/via in a layer of insulating material, performing a deposition process to form an as-deposited copper-based seed layer above the layer of insulating material in the trench/via, wherein the copper-based seed layer has a first portion that is positioned above a bottom of the trench/via that is thicker than second portions of the copper seed layer that are positioned above sidewalls of the trench/via, performing an etching process on the as-deposited copper-based seed layer to substantially remove portions of the second portions of the as-deposited copper-based seed layer and performing an electroless deposition process to fill the trench/via with a copper-based material.

摘要翻译： 这里公开了在集成电路器件上形成铜基导电结构的各种方法。 在一个示例中，该方法包括在绝缘材料层中形成沟槽/通孔，执行沉积工艺以在沟槽/通孔中的绝缘材料层上方形成沉积的基于铜的种子层，其中铜 - 基于晶种的层具有位于沟槽/通孔的底部之上的第一部分，其比位于沟槽/通孔侧壁上方的铜籽晶层的第二部分更厚，对沉积的铜进行蚀刻工艺 基本种子层，以基本上去除沉积的铜基种子层的第二部分的部分，并执行无电沉积工艺以用铜基材料填充沟槽/通孔。

公开(公告)号：US20130309863A1

公开(公告)日：2013-11-21

申请号：US13476692

申请日：2012-05-21

申请人： Sean X. Lin ,  Ming He ,  Xunyuan Zhang ,  Larry Zhao

发明人： Sean X. Lin ,  Ming He ,  Xunyuan Zhang ,  Larry Zhao

IPC分类号： H01L21/768

CPC分类号： H01L21/76874 ,  H01L21/76843 ,  H01L21/76865 ,  H01L21/76879

摘要： Disclosed herein are various methods of forming copper-based conductive structures on integrated circuit devices. In one example, the method includes forming a trench/via in a layer of insulating material, performing a deposition process to form an as-deposited copper-based seed layer above the layer of insulating material in the trench/via, wherein the copper-based seed layer has a first portion that is positioned above a bottom of the trench/via that is thicker than second portions of the copper seed layer that are positioned above sidewalls of the trench/via, performing an etching process on the as-deposited copper-based seed layer to substantially remove portions of the second portions of the as-deposited copper-based seed layer and performing an electroless deposition process to fill the trench/via with a copper-based material.

摘要翻译： 这里公开了在集成电路器件上形成铜基导电结构的各种方法。 在一个示例中，该方法包括在绝缘材料层中形成沟槽/通孔，执行沉积工艺以在沟槽/通孔中的绝缘材料层上形成沉积的基于铜的种子层，其中铜 - 基于晶种的层具有位于沟槽/通孔的底部之上的第一部分，其比位于沟槽/通孔侧壁上方的铜籽晶层的第二部分更厚，对沉积的铜进行蚀刻工艺 基本种子层，以基本上去除沉积的铜基种子层的第二部分的部分，并执行无电沉积工艺以用铜基材料填充沟槽/通孔。

公开(公告)号：US20130244421A1

公开(公告)日：2013-09-19

申请号：US13422295

申请日：2012-03-16

申请人： Sean X. LIN ,  Ming HE ,  Xunyuan ZHANG ,  Larry ZHAO

发明人： Sean X. LIN ,  Ming HE ,  Xunyuan ZHANG ,  Larry ZHAO

IPC分类号： H01L21/768

CPC分类号： H01L21/76879 ,  H01L21/76861 ,  H01L21/76864 ,  H01L21/76865 ,  H01L21/76874 ,  H01L2924/0002

摘要： Disclosed herein are various methods of forming copper-based conductive structures on integrated circuit devices. In one example, the method includes the steps of forming a trench/via in a layer of insulating material, forming a copper-based seed layer above the layer of insulating material and in the trench/via, performing a heating process on the copper-based seed layer to increase an amount of the copper-based seed layer positioned proximate a bottom of the trench/via, performing an etching process on said copper-based seed layer and performing an electroless copper deposition process to fill the trench/via with a copper-based material.

摘要翻译： 这里公开了在集成电路器件上形成铜基导电结构的各种方法。 在一个示例中，该方法包括以下步骤：在绝缘材料层中形成沟槽/通孔，在绝缘材料层上方和沟槽/通孔中形成铜基种子层，在铜 - 以增加位于沟槽/通孔的底部附近的铜基种子层的量，对所述铜基种子层进行蚀刻工艺，并执行无电镀铜沉积工艺以填充沟槽/通孔 铜基材料。