System on chip including memory management unit and memory address translation method thereof
    2.
    发明授权
    System on chip including memory management unit and memory address translation method thereof 有权
    片上系统,包括内存管理单元及其内存地址转换方法

    公开(公告)号:US09348764B2

    公开(公告)日:2016-05-24

    申请号:US14138982

    申请日:2013-12-23

    IPC分类号: G06F12/10 G06F12/02 G06F12/08

    摘要: A system on chip (SoC) including a memory management unit (MMU) and a memory address translation method thereof are provided. The SoC includes a master intellectual property (IP) configured to output a request corresponding to each of a plurality of working sets; an MMU module comprising a plurality of MMUs, each of which is allocated for one of the working sets and translates virtual addresses corresponding to the request into physical addresses; a first bus interconnect configured to connect the MMU module with a memory device and to transmit the request, on which address translation has been performed in at least one of the MMUs, to the memory device; and a second bus interconnect configured to connect the master IP with the MMU module and to allocate one of the MMUs for each of the working sets.

    摘要翻译: 提供了包括存储器管理单元(MMU)及其存储器地址转换方法的片上系统(SoC)。 所述SoC包括配置为输出与多个工作组中的每一个对应的请求的主知识产权(IP); 一个MMU模块,包括多个MMU,每个MMU被分配用于一个工作组,并将与该请求对应的虚拟地址转换成物理地址; 第一总线互连配置为将MMU模块与存储器装置连接并且将已经在至少一个MMU中进行了地址转换的请求发送到存储器装置; 以及第二总线互连,其被配置为将主IP与MMU模块连接,并为每个工作集分配一个MMU。

    SYSTEM ON CHIP INCLUDING MEMORY MANAGEMENT UNIT AND MEMORY ADDRESS TRANSLATION METHOD THEREOF
    4.
    发明申请
    SYSTEM ON CHIP INCLUDING MEMORY MANAGEMENT UNIT AND MEMORY ADDRESS TRANSLATION METHOD THEREOF 有权
    芯片系统,包括存储器管理单元和存储器地址转换方法

    公开(公告)号:US20140195742A1

    公开(公告)日:2014-07-10

    申请号:US14138982

    申请日:2013-12-23

    IPC分类号: G06F12/10 G06F12/02 G06F12/08

    摘要: A system on chip (SoC) including a memory management unit (MMU) and a memory address translation method thereof are provided. The SoC includes a master intellectual property (IP) configured to output a request corresponding to each of a plurality of working sets; an MMU module comprising a plurality of MMUs, each of which is allocated for one of the working sets and translates virtual addresses corresponding to the request into physical addresses; a first bus interconnect configured to connect the MMU module with a memory device and to transmit the request, on which address translation has been performed in at least one of the MMUs, to the memory device; and a second bus interconnect configured to connect the master IP with the MMU module and to allocate one of the MMUs for each of the working sets.

    摘要翻译: 提供了包括存储器管理单元(MMU)及其存储器地址转换方法的片上系统(SoC)。 所述SoC包括配置为输出与多个工作组中的每一个对应的请求的主知识产权(IP); 一个MMU模块,包括多个MMU,每个MMU被分配用于一个工作组,并将与该请求对应的虚拟地址转换成物理地址; 第一总线互连配置为将MMU模块与存储器装置连接并且将已经在至少一个MMU中进行了地址转换的请求发送到存储器装置; 以及第二总线互连,其被配置为将主IP与MMU模块连接,并为每个工作集分配一个MMU。

    SYSTEM-ON-CHIP AND METHOD OF OPERATING THE SAME
    6.
    发明申请
    SYSTEM-ON-CHIP AND METHOD OF OPERATING THE SAME 有权
    系统芯片及其操作方法

    公开(公告)号:US20140258674A1

    公开(公告)日:2014-09-11

    申请号:US14203799

    申请日:2014-03-11

    IPC分类号: G06F12/10

    摘要: A system on chip (SoC) includes a central processing unit (CPU), an intellectual property (IP) block, and a memory management unit (MMU). The CPU is configured to set a prefetch direction corresponding to a working set of data. The IP block is configured to process the working set of data. The MMU is configured to prefetch a next page table entry from a page table based on the prefetch direction during address translation between a virtual address of the working set of data and a physical address.

    摘要翻译: 片上系统(SoC)包括中央处理单元(CPU),知识产权(IP)块和存储器管理单元(MMU)。 CPU被配置为设置与工作数据集对应的预取方向。 IP块被配置为处理数据的工作集。 MMU被配置为基于在工作数据集的虚拟地址与物理地址之间的地址转换期间基于预取方向从页表预取下一页表条目。