公开(公告)号：US08020052B2

公开(公告)日：2011-09-13

申请号：US12715534

申请日：2010-03-02

Applicant: Chung-Chi Huang ,  Guang-Dong Yuan ,  De-Sheng Qiu ,  Xun-Chun Qiu ,  Xiang Wang ,  Rong Hu

Inventor： Chung-Chi Huang ,  Guang-Dong Yuan ,  De-Sheng Qiu ,  Xun-Chun Qiu ,  Xiang Wang ,  Rong Hu

IPC: G06F11/00

CPC classification number: G06F17/30076 ,  H04L41/16

Abstract: A fault analysis result generating system includes an extracting unit, a converting unit, a determining unit, and a result generating unit. The system extracts fault analysis files, converts the fault analysis files to a first predetermined file format which is easy to be processed, converts the fault analysis files with the first predetermined file format to a second predetermined file format, and then transfers the fault analysis files with the second predetermined file format to a learning sharing module.

Abstract translation: 故障分析结果产生系统包括提取单元，转换单元，确定单元和结果生成单元。 系统提取故障分析文件，将故障分析文件转换为易于处理的第一预定文件格式，将第一预定文件格式的故障分析文件转换为第二预定文件格式，然后传送故障分析文件 具有第二预定文件格式到学习共享模块。

公开(公告)号：US10216418B2

公开(公告)日：2019-02-26

申请号：US14863438

申请日：2015-09-23

Applicant: Inseok Stephen Choi ,  Yang Seok Ki ,  Sheng Qiu

Inventor： Inseok Stephen Choi ,  Yang Seok Ki ,  Sheng Qiu

IPC: G06F12/00 ,  G06F3/06 ,  G06F12/02

Abstract: Embodiments of the inventive concept improve performance, energy efficiency, and capacity of storage solutions, for example, by reducing the data movement between the CPU and the storage device and increasing the available capacity of the underlying storage devices via in-storage support for data compaction. Embodiments include a storage apparatus and method for autonomous in-storage space compaction initiated by a host-side command and according to metadata specified by a host. A space compact engine can function as an independent module or logic section within a storage device, which can migrate data within the storage device, thereby freeing up capacity and making preexisting data more compact. The space compact engine can cause self compact operations, self compact and trim operations, move and compact operations, and/or merge and compact operations. The space compact engine can notify the host of the completion of the operations.

公开(公告)号：US20070073679A1

公开(公告)日：2007-03-29

申请号：US11309173

申请日：2006-07-06

Applicant: Chang-Wen Fu ,  Ge-Xin Zeng ,  De-Sheng Qiu ,  Hui-Zhang Wang

Inventor： Chang-Wen Fu ,  Ge-Xin Zeng ,  De-Sheng Qiu ,  Hui-Zhang Wang

IPC: G06F17/30

CPC classification number: G06Q10/06

Abstract: An exemplary method for generating a BOM file is disclosed. The method includes the steps of: extracting data on components of a circuit design diagram of a motherboard, and storing the data in an spreadsheet as a non-standardized original BOM file; determining whether the data meet requirements corresponding to designing standards of the motherboard by checking the data of the non-standardized original BOM file; classifying the data into lists according to predefined manufacturing procedures; and automatically generating a standardized BOM file according to the corresponding lists. A related system is also disclosed.

Abstract translation: 公开了一种生成BOM文件的示例性方法。 该方法包括以下步骤：提取主板电路设计图的组件数据，并将数据存储在电子表格中作为非标准化原始BOM文件; 通过检查非标准原始BOM文件的数据，确定数据是否满足与主板设计标准相对的要求; 根据预定义的制造程序将数据分类到列表中; 并根据相应的列表自动生成标准化的BOM文件。 还公开了相关系统。

公开(公告)号：US09792227B2

公开(公告)日：2017-10-17

申请号：US14547126

申请日：2014-11-18

Applicant: Yang Seok Ki ,  Sheng Qiu

Inventor： Yang Seok Ki ,  Sheng Qiu

IPC: G06F12/12 ,  G06F12/123 ,  G06F12/0871 ,  G06F12/02

CPC classification number: G06F12/123 ,  G06F12/0238 ,  G06F12/0871 ,  G06F2212/1044 ,  G06F2212/1048 ,  G06F2212/225 ,  G06F2212/282 ,  G06F2212/401 ,  G06F2212/7205 ,  G06F2212/7208

Abstract: Inventive aspects include a heterogeneous unified memory section, which includes an extended unified memory space across a plurality of physical heterogeneous memory modules. A cold page reclamation logic section can receive and prioritize cold pages from a system memory. The cold pages can include a first subset of memory pages having a first type of memory data and a second subset of memory pages having a second type of memory data. For example, the cold pages can include anon-type memory pages and file-type memory pages. A dynamic tuning logic section can manage space allocation within the extended unified memory space. An intelligent page sort logic section can distribute the cold pages among different pools of physical heterogeneous memory modules based on varying characteristics of the pools, and based on the assigned priorities.

公开(公告)号：US20160350007A1

公开(公告)日：2016-12-01

申请号：US14863438

申请日：2015-09-23

Applicant: Inseok Stephen CHOI ,  Yang Seok KI ,  Sheng QIU

Inventor： Inseok Stephen CHOI ,  Yang Seok KI ,  Sheng QIU

IPC: G06F3/06 ,  G06F12/02

CPC classification number: G06F3/0608 ,  G06F3/0638 ,  G06F3/0683 ,  G06F12/0238 ,  G06F2212/1044 ,  G06F2212/163 ,  G06F2212/7205

Abstract: Embodiments of the inventive concept improve performance, energy efficiency, and capacity of storage solutions, for example, by reducing the data movement between the CPU and the storage device and increasing the available capacity of the underlying storage devices via in-storage support for data compaction. Embodiments include a storage apparatus and method for autonomous in-storage space compaction initiated by a host-side command and according to metadata specified by a host. A space compact engine can function as an independent module or logic section within a storage device, which can migrate data within the storage device, thereby freeing up capacity and making preexisting data more compact. The space compact engine can cause self compact operations, self compact and trim operations, move and compact operations, and/or merge and compact operations. The space compact engine can notify the host of the completion of the operations.

Abstract translation: 本发明概念的实施例通过减少CPU和存储设备之间的数据移动来提高存储解决方案的性能，能量效率和容量，并通过用于数据压缩的存储器支持来增加底层存储设备的可用容量 。 实施例包括用于由主机侧命令发起的自主存储空间压缩并根据由主机指定的元数据的存储装置和方法。 空间紧凑型引擎可以用作存储设备内的独立模块或逻辑部分，可以迁移存储设备内的数据，从而释放容量并使预先存在的数据更加紧凑。 空间紧凑型发动机可以实现自动紧凑的操作，自动紧凑和调整操作，移动和紧凑的操作，和/或合并和紧凑的操作。 空间紧凑型引擎可以通知主机完成操作。

公开(公告)号：US20110131454A1

公开(公告)日：2011-06-02

申请号：US12715534

申请日：2010-03-02

Applicant: CHUNG-CHI HUANG ,  GUANG-DONG YUAN ,  DE-SHENG QIU ,  XUN-CHUN QIU ,  XIANG WANG ,  RONG HU

Inventor： CHUNG-CHI HUANG ,  GUANG-DONG YUAN ,  DE-SHENG QIU ,  XUN-CHUN QIU ,  XIANG WANG ,  RONG HU

IPC: G06F11/07 ,  G06F3/048

CPC classification number: G06F17/30076 ,  H04L41/16

Abstract: A fault analysis result generating system includes an extracting unit, a converting unit, a determining unit, and a result generating unit. The system extracts fault analysis files, converts the fault analysis files to a first predetermined file format which is easy to be processed, converts the fault analysis files with the first predetermined file format to a second predetermined file format, and then transfers the fault analysis files with the second predetermined file format to a learning sharing module.

Abstract translation: 故障分析结果产生系统包括提取单元，转换单元，确定单元和结果生成单元。 系统提取故障分析文件，将故障分析文件转换为易于处理的第一预定文件格式，将第一预定文件格式的故障分析文件转换为第二预定文件格式，然后传送故障分析文件 具有第二预定文件格式到学习共享模块。

公开(公告)号：US20160055097A1

公开(公告)日：2016-02-25

申请号：US14547126

申请日：2014-11-18

Applicant: Yang Seok KI ,  Sheng QIU

Inventor： Yang Seok KI ,  Sheng QIU

IPC: G06F12/12

CPC classification number: G06F12/123 ,  G06F12/0238 ,  G06F12/0871 ,  G06F2212/1044 ,  G06F2212/1048 ,  G06F2212/225 ,  G06F2212/282 ,  G06F2212/401 ,  G06F2212/7205 ,  G06F2212/7208

Abstract: Inventive aspects include a heterogeneous unified memory section, which includes an extended unified memory space across a plurality of physical heterogeneous memory modules. A cold page reclamation logic section can receive and prioritize cold pages from a system memory. The cold pages can include a first subset of memory pages having a first type of memory data and a second subset of memory pages having a second type of memory data. For example, the cold pages can include anon-type memory pages and file-type memory pages. A dynamic tuning logic section can manage space allocation within the extended unified memory space. An intelligent page sort logic section can distribute the cold pages among different pools of physical heterogeneous memory modules based on varying characteristics of the pools, and based on the assigned priorities.

Abstract translation: 发明方面包括异构统一存储器部分，其包括跨越多个物理异构存储器模块的扩展的统一存储器空间。 冷页回收逻辑部分可以从系统内存中接收冷页面的优先级。 冷页可以包括具有第一类型的存储器数据的存储器页的第一子集和具有第二类型的存储器数据的存储器页的第二子集。 例如，冷页面可以包括anon型存储器页面和文件类型的存储器页面。 动态调整逻辑部分可以管理扩展统一存储空间内的空间分配。 智能页面排序逻辑部分可以根据池的不同特征，并根据分配的优先级，在不同的物理异构存储器模块池之间分配冷页面。

公开(公告)号：US20130064183A1

公开(公告)日：2013-03-14

申请号：US13614034

申请日：2012-09-13

Applicant: Ling Zhu ,  Sheng Qiu

Inventor： Ling Zhu ,  Sheng Qiu

IPC: H04W52/20

CPC classification number: H04W52/20 ,  H04W52/12 ,  H04W52/386

Abstract: A power control method performing a power control operation between a radio network controller and a node B is provided. The method includes steps of: calculating a packet error rate threshold and a base received packet count according to a target block error rate (BLER) and a precision of the target BLER; obtaining an accumulated received packet count and an accumulated packet error count; increasing a target signal-to-interference ratio (SIR) of the node B when the accumulated packet error count is greater than a product of the accumulated received packet count and the packet error rate threshold; decreasing the target SIR when the accumulated received packet count is greater than or equal to a product of the base received packet count and a threshold parameter; and resetting the accumulated received packet count and the accumulated packet error count after the target SIR is adjusted.

Abstract translation: 提供了在无线网络控制器和节点B之间执行功率控制操作的功率控制方法。 该方法包括以下步骤：根据目标块错误率（BLER）和目标BLER的精度来计算分组错误率阈值和基本接收分组计数; 获得累积的接收分组计数和累积分组错误计数; 当累积的分组错误计数大于累积的接收分组计数和分组错误率阈值的乘积时，增加节点B的目标信号干扰比（SIR）; 当累积的接收分组计数大于或等于基本接收分组计数与阈值参数的乘积时，降低目标SIR; 并且在调整目标SIR之后复位累积的接收分组计数和累积分组错误计数。

公开(公告)号：US08861442B2

公开(公告)日：2014-10-14

申请号：US13614034

申请日：2012-09-13

Applicant: Ling Zhu ,  Sheng Qiu

Inventor： Ling Zhu ,  Sheng Qiu

IPC: H04W4/00 ,  H04W52/38 ,  H04W52/20 ,  H04W52/12

CPC classification number: H04W52/20 ,  H04W52/12 ,  H04W52/386

Abstract: A power control method performing a power control operation between a radio network controller and a node B is provided. The method includes steps of: calculating a packet error rate threshold and a base received packet count according to a target block error rate (BLER) and a precision of the target BLER; obtaining an accumulated received packet count and an accumulated packet error count; increasing a target signal-to-interference ratio (SIR) of the node B when the accumulated packet error count is greater than a product of the accumulated received packet count and the packet error rate threshold; decreasing the target SIR when the accumulated received packet count is greater than or equal to a product of the base received packet count and a threshold parameter; and resetting the accumulated received packet count and the accumulated packet error count after the target SIR is adjusted.

Abstract translation: 提供了在无线网络控制器和节点B之间执行功率控制操作的功率控制方法。 该方法包括以下步骤：根据目标块错误率（BLER）和目标BLER的精度来计算分组错误率阈值和基本接收分组计数; 获得累积的接收分组计数和累积分组错误计数; 当累积的分组错误计数大于累积的接收分组计数和分组错误率阈值的乘积时，增加节点B的目标信号干扰比（SIR）; 当累积的接收分组计数大于或等于基本接收分组计数与阈值参数的乘积时，降低目标SIR; 并且在调整目标SIR之后复位累积的接收分组计数和累积分组错误计数。

公开(公告)号：US20070038964A1

公开(公告)日：2007-02-15

申请号：US11308970

申请日：2006-06-01

Applicant: Ge-Xin Zeng ,  Chang-Wen Fu ,  De-Sheng Qiu

Inventor： Ge-Xin Zeng ,  Chang-Wen Fu ,  De-Sheng Qiu

IPC: G06F17/50

CPC classification number: G06F17/5022

Abstract: A system is provided for extracting material changes in different design diagrams of a motherboard. The system includes: an extracting module for extracting a first raw BOM from a first circuit design diagram of the motherboard, and for extracting a second raw BOM from a second circuit design diagram of the motherboard, wherein the second circuit design diagram is partially identical to the first circuit design diagram; a converting module for converting the first raw BOM to a first standard BOM, and for converting the second raw BOM to a second standard BOM; a integrity checking module for determining whether data in the two standard BOMs are error free; and an comparing module for comparing the two standard BOMs to extract material changes. A related method is also disclosed.

Abstract translation: 提供一种用于提取主板不同设计图中的材料变化的系统。 该系统包括：提取模块，用于从母板的第一电路设计图提取第一原始BOM，并从主板的第二电路设计图提取第二原始BOM，其中第二电路设计图部分相同于 第一电路设计图; 用于将第一原始BOM转换为第一标准BOM并将第二原始BOM转换为第二标准BOM的转换模块; 用于确定两个标准BOM中的数据是否无错误的完整性检查模块; 以及用于比较两个标准BOM以提取材料变化的比较模块。 还公开了相关方法。