公开(公告)号：US08022465B2

公开(公告)日：2011-09-20

申请号：US11274781

申请日：2005-11-15

申请人： Yen-Hao Shih ,  Min-Ta Wu ,  Shin-Chin Lee ,  Jung-Yu Hsieh ,  Erh-Kun Lai ,  Kuang Yeu Hsieh

发明人： Yen-Hao Shih ,  Min-Ta Wu ,  Shin-Chin Lee ,  Jung-Yu Hsieh ,  Erh-Kun Lai ,  Kuang Yeu Hsieh

IPC分类号： H01L29/792

CPC分类号： H01L29/792 ,  H01L21/28282 ,  H01L29/513 ,  H01L29/518

摘要： Memory cells comprising: a semiconductor substrate having at least two source/drain regions separated by a channel region; a charge-trapping structure disposed above the channel region; and a gate disposed above the charge-trapping structure; wherein the charge-trapping structure comprises a bottom insulating layer, a first charge-trapping layer, and a second charge-trapping layer, wherein an interface between the bottom insulating layer and the substrate has a hydrogen concentration of less than about 3×1011/cm−2, and methods for forming such memory cells.

摘要翻译： 存储单元包括：半导体衬底，具有由沟道区分开的至少两个源极/漏极区域; 设置在通道区域上方的电荷捕获结构; 以及设置在电荷捕获结构上方的栅极; 其中所述电荷捕获结构包括底部绝缘层，第一电荷俘获层和第二电荷俘获层，其中所述底部绝缘层和所述基底之间的界面的氢浓度小于约3×1011 / cm -2，以及形成这种记忆单元的方法。

公开(公告)号：US20080096396A1

公开(公告)日：2008-04-24

申请号：US11964322

申请日：2007-12-26

申请人： Yen-Hao SHIH ,  Min-Ta WU ,  Shin-Chin LEE ,  Jung-Yu HSIEH ,  Erh-Kun LAI ,  Kuang HSIEH

发明人： Yen-Hao SHIH ,  Min-Ta WU ,  Shin-Chin LEE ,  Jung-Yu HSIEH ,  Erh-Kun LAI ,  Kuang HSIEH

IPC分类号： H01L21/31

CPC分类号： H01L29/792 ,  H01L21/28282 ,  H01L29/513 ,  H01L29/518

摘要： Memory cells comprising: a semiconductor substrate having at least two source/drain regions separated by a channel region; a charge-trapping structure disposed above the channel region; and a gate disposed above the charge-trapping structure; wherein the charge-trapping structure comprises a bottom insulating layer, a first charge-trapping layer, and a second charge-trapping layer, wherein an interface between the bottom insulating layer and the substrate has a hydrogen concentration of less than about 3×10/cm−2, and methods for forming such memory cells.

摘要翻译： 存储单元包括：半导体衬底，具有由沟道区分开的至少两个源极/漏极区域; 设置在通道区域上方的电荷捕获结构; 以及设置在电荷捕获结构上方的栅极; 其中所述电荷捕获结构包括底部绝缘层，第一电荷俘获层和第二电荷俘获层，其中所述底部绝缘层和所述基底之间的界面具有小于约3×10 / SUP> -2，以及形成这种存储单元的方法。

公开(公告)号：US07095408B1

公开(公告)日：2006-08-22

申请号：US09358862

申请日：1999-07-22

申请人： Kuang-Rong Lu ,  Shin-Chin Lee

发明人： Kuang-Rong Lu ,  Shin-Chin Lee

IPC分类号： G06T15/00

CPC分类号： G06T17/10 ,  G06T11/203 ,  Y10S715/964

摘要： A system and method for creating a three-dimensional graphic object is disclosed. The system comprises an outline-processing unit for modeling a first two-dimensional object by at least one outline, a curve-processing unit for modeling a second two-dimensional object by a closed curve, a curve-adjusting unit for adjusting the closed curve in response to the outline so as to generate a third two-dimensional object, a uniting unit for uniting the first and third two-dimensional objects to generate a-fourth two-dimensional object modeled by the adjusted closed curve and the at least one outline, a 3-D creating unit for generating the first, third and fourth two-dimensional objects three-dimensional to form a first three-dimensional object, a second three-dimensional object and a third three-dimensional object, respectively, and a graphics-combining unit for grouping two of the first, second and third three-dimensional objects for creating the three-dimensional graphic object in response to either a convex or a concave mode selection.

摘要翻译： 公开了一种用于创建三维图形对象的系统和方法。 该系统包括用于通过至少一个轮廓对第一二维物体建模的轮廓处理单元，用于通过闭合曲线对第二二维物体进行建模的曲线处理单元，用于调整闭合曲线的曲线调节单元 响应于所述轮廓以产生第三二维对象，所述联合单元用于将所述第一和第三二维对象结合以生成由所述调整后的闭合曲线建模的第四二维对象和所述至少一个轮廓 ，3-D生成单元，用于分别生成三维的第一，第三和第四二维物体以分别形成第一三维物体，第二三维物体和第三三维物体，以及图形 组合单元，用于对第一，第二和第三三维对象中的两个进行分组，以响应于凸模式或凹模式选择来创建三维图形对象。