公开(公告)号：US5287440A

公开(公告)日：1994-02-15

申请号：US491826

申请日：1990-03-12

Applicant: Kimiya Yamaashi ,  Shuuichi Miura ,  Yuji Taki ,  Atsushi Kawabata

Inventor： Kimiya Yamaashi ,  Shuuichi Miura ,  Yuji Taki ,  Atsushi Kawabata

IPC: G06T11/00 ,  G06T15/30 ,  G09G5/393 ,  G06F15/62

CPC classification number: G06T15/30 ,  G09G5/393

Abstract: A graphic processing device is composed of a main storage device, a drawing control device and a drawing device. The main storage device stores data relative to the coordinates of plural graphics. The drawing control device reads out the data relative to the coordinates of the plural graphics stored in the main storage device, scans the coordinate data to calculate the coordinates of intersecting points of a scanning line and the plural graphics for each position of the scanning line. The drawing control device also determines an overlapping area (AND area) or a common area (OR area) of the plural graphics on the basis of the coordinates of the intersecting points of the plural graphics and the scanning line. The drawing device draws the overlapping area (AND area) and the common area (OR area) of the plural graphics as a graphic.

Abstract translation: 图形处理装置由主存储装置，绘图控制装置和绘图装置构成。 主存储装置存储关于多个图形的坐标的数据。 绘图控制装置读出相对于存储在主存储装置中的多个图形的坐标的数据，扫描坐标数据以计算扫描线的每个位置的扫描线和多个图形的交点的坐标。 绘图控制装置还基于多个图形和扫描线的交点的坐标，确定多个图形的重叠区域（AND区域）或公共区域（OR区域）。 绘图装置绘制多个图形的重叠区域（AND区域）和公共区域（OR区域）作为图形。

公开(公告)号：US5274717A

公开(公告)日：1993-12-28

申请号：US963675

申请日：1992-10-20

Applicant: Shuuichi Miura ,  Yoshiki Kobayashi ,  Tadashi Fukushima ,  Yoshiyuki Okuyama ,  Takeshi Katoh ,  Kotaro Hirasawa ,  Kazuyoshi Asada

Inventor： Shuuichi Miura ,  Yoshiki Kobayashi ,  Tadashi Fukushima ,  Yoshiyuki Okuyama ,  Takeshi Katoh ,  Kotaro Hirasawa ,  Kazuyoshi Asada

IPC: G06T5/20 ,  G06K9/36

CPC classification number: G06T5/20

Abstract: An LSI parallel image processor in which line buffers and data-flow switching circuits each requiring a larger amount of hardware in the prior art are incorporated into an LSI circuit, the image data delayed by the line buffers is output from an image data output port, shift registers each having a variable number of steps for preserving local image regions are intermittently shifted-in in accordance with applied clocks, and the contents of the shift registers are sequentially read out.

Abstract translation: LSI现有技术中需要大量硬件的行缓冲器和数据流切换电路的LSI并行图像处理器被并入到LSI电路中，由图像数据输出端口输出由行缓冲器延迟的图像数据， 根据所施加的时钟，每个具有用于保持局部图像区域的可变步数的移位寄存器被间歇地移位，并且顺序读出移位寄存器的内容。

公开(公告)号：US5345560A

公开(公告)日：1994-09-06

申请号：US921742

申请日：1992-07-30

Applicant: Shuuichi Miura ,  Kenichi Kurosawa ,  Tetsuaki Nakamikawa ,  Kenji Hirose

Inventor： Shuuichi Miura ,  Kenichi Kurosawa ,  Tetsuaki Nakamikawa ,  Kenji Hirose

IPC: G06F9/38 ,  G06F12/02 ,  G06F12/08

CPC classification number: G06F12/0862 ,  G06F12/0811 ,  G06F2212/6022 ,  G06F2212/6026

Abstract: A prefetch buffer adapted to be installed between a cache memory and a main memory in a computer system having a CPU. The prefetch buffer includes a buffer storage having at least one entry for storing prefetched data and an address tag, which is to be used for searching the data, as a pair; a data searcher for searching, from the data stored in the buffer storage, for data having an address requested by the CPU; and an address estimator for determining an address of data to be prefetched next from the main memory, based on the address requested by the CPU and also on a history of the addresses of data prefetched in the past from the main memory; and an address generator for generating an address of data to be prefetched from the main memory. With this arrangement, it is possible to improve the hit ratio of the prefetch buffer regardless of the direction in which the access address varies.

Abstract translation: 一种适于安装在具有CPU的计算机系统中的高速缓冲存储器和主存储器之间的预取缓冲器。 预取缓冲器包括具有用于存储预取数据的至少一个条目和要用于搜索数据的地址标签作为一对的缓冲存储器; 数据搜索器，用于从存储在缓冲存储器中的数据中搜索具有由CPU请求的地址的数据; 以及地址估计器，用于基于所述CPU所请求的地址以及来自主存储器的过去预取的数据的地址的历史来确定要从主存储器预先预取的数据的地址; 以及地址发生器，用于从主存储器生成要预取的数据的地址。 利用这种布置，无论访问地址变化的方向如何，都可以提高预取缓冲器的命中率。

公开(公告)号：US4733305A

公开(公告)日：1988-03-22

申请号：US712031

申请日：1985-03-15

Applicant: Shuuichi Miura ,  Tadashi Fukushima ,  Yoshiki Kobayashi ,  Masao Takatoo ,  Yoichi Takagi

Inventor： Shuuichi Miura ,  Tadashi Fukushima ,  Yoshiki Kobayashi ,  Masao Takatoo ,  Yoichi Takagi

IPC: G06F3/153 ,  G06F3/048 ,  G06T1/00 ,  G06T1/20 ,  G06T11/80 ,  H04N1/40 ,  H04N1/60

CPC classification number: H04N1/60 ,  G06T1/20 ,  H04N1/40

Abstract: A conversational picture processing system having a temporary memory for storing picture processing commands inputted by an operator. The system executes picture processing commands inputted by the operator, displays processed picture as a result of execution of each command, and stores the commands in the temporary memory. The system reads out a picture processing command specified by the operator from the temporary memory and stores the command as a registered command in a command list memory within the system.

Abstract translation: 一种对话图像处理系统，具有用于存储由操作者输入的图像处理命令的临时存储器。 系统执行由操作者输入的图像处理命令，作为执行每个命令的结果显示处理后的图像，并将该命令存储在临时存储器中。 系统从临时存储器读出由操作者指定的图像处理命令，并将该命令作为注册命令存储在系统内的命令列表存储器中。

公开(公告)号：US5487516A

公开(公告)日：1996-01-30

申请号：US213358

申请日：1994-03-15

Applicant: Satoru Murata ,  Atsushi Kawabata ,  Shuuichi Miura ,  Korefumi Tashiro ,  Yasuo Morooka ,  Masakazu Yahiro ,  Masaki Katahira ,  Kazuo Kera

Inventor： Satoru Murata ,  Atsushi Kawabata ,  Shuuichi Miura ,  Korefumi Tashiro ,  Yasuo Morooka ,  Masakazu Yahiro ,  Masaki Katahira ,  Kazuo Kera

IPC: B61L3/00 ,  B61L27/00

CPC classification number: B61L27/0027 ,  B61L27/0022

Abstract: A train control system includes an equipment for issuing, to a train under control based on a predetermined train schedule, an operational target to be attained in terms of the aimed position, aimed time and aimed speed. Once a target is issued, a possible run region of the train is determined, and another target may be set within the possible run region such that the train is not subjected to the ATC-based speed limitation or the like, thereby minimizing the cause of delay of the train operation.

Abstract translation: 列车控制系统包括一个设备，用于根据预定的列车时刻表，向被控制的列车发出目标位置，目标时间和目标速度所要达到的操作目标。 一旦发出目标，则确定列车的可能的行驶区域，并且可以在可能的行驶区域内设置另一个目标，使得列车不经受基于ATC的速度限制等，从而最小化 延迟火车运行。

公开(公告)号：US5600770A

公开(公告)日：1997-02-04

申请号：US460846

申请日：1995-06-05

Applicant: Atsushi Kawabata ,  Shuuichi Miura ,  Kimiya Yamaashi ,  Yuji Taki ,  Yoshiki Kobayashi ,  Shinya Tanifuji

Inventor： Atsushi Kawabata ,  Shuuichi Miura ,  Kimiya Yamaashi ,  Yuji Taki ,  Yoshiki Kobayashi ,  Shinya Tanifuji

IPC: B41J5/30 ,  G06F3/12 ,  G06F17/21 ,  G06K15/00 ,  G09G5/24 ,  G06T11/00

CPC classification number: G06F3/1297

Abstract: A plurality of letter output devices (workstations, printers) are connected to a letter data control device by a transmission path. The control device stores letter data for transmission to the letter output devices, and is able to convert that letter data to a desired layout (e.g. from a vector font to a dot font) and then transmits the converted letter data to one or more of the letter output devices. The control device is able to select part of its stored letter data for transmission so that only commonly used letter data need be transmitted during start up of the system. Since a large amount of letter data may be stored in the control device, and only part may be transmitted to the letter output devices, those output devices can have a relatively small memory.

Abstract translation: 多个字母输出设备（工作站，打印机）通过传输路径连接到字母数据控制设备。 控制装置存储用于发送到字母输出装置的字母数据，并且能够将该字母数据转换为期望的布局（例如，从矢量字体到点字体），然后将转换的字母数据发送到一个或多个 字母输出设备。 控制装置能够选择其存储的字母数据的一部分进行传输，使得仅在系统启动期间才需要传送常用的字母数据。 由于可以将大量的字母数据存储在控制装置中，并且只有部分可以被发送到字母输出装置，所以这些输出装置可以具有较小的存储器。

公开(公告)号：US5444829A

公开(公告)日：1995-08-22

申请号：US997628

申请日：1992-12-28

Applicant: Atsushi Kawabata ,  Shuuichi Miura ,  Kimiya Yamaashi ,  Yuji Taki ,  Yoshiki Kobayashi ,  Shinya Tanifuji

Inventor： Atsushi Kawabata ,  Shuuichi Miura ,  Kimiya Yamaashi ,  Yuji Taki ,  Yoshiki Kobayashi ,  Shinya Tanifuji

IPC: B41J5/30 ,  G06F3/12 ,  G06F17/21 ,  G06K15/00 ,  G09G5/24 ,  G06T11/00

CPC classification number: G06F3/1297

Abstract: A plurality of letter output devices (workstations, printers) are connected to a letter data control device by a transmission path. The control device stores letter data for transmission to the letter output devices, and is able to convert that letter data to a desired layout (e.g. from a vector font to a dot font) and then transmits the converted letter data to one or more of the letter output devices. The control device is able to select part of its stored letter data for transmission so that only commonly used letter data need be transmitted during start up of the system. Since a large amount of letter data may be stored in the control device, and only part may be transmitted to the letter output devices, those output devices can have a relatively small memory.

Abstract translation: 多个字母输出设备（工作站，打印机）通过传输路径连接到字母数据控制设备。 控制装置存储用于发送到字母输出装置的字母数据，并且能够将该字母数据转换为期望的布局（例如，从矢量字体到点字体），然后将转换的字母数据发送到一个或多个 字母输出设备。 控制装置能够选择其存储的字母数据的一部分进行传输，使得仅在系统启动期间才需要传送常用的字母数据。 由于可以将大量的字母数据存储在控制装置中，并且只有部分可以被发送到字母输出装置，所以这些输出装置可以具有较小的存储器。