公开(公告)号：US07689403B2

公开(公告)日：2010-03-30

申请号：US12148205

申请日：2008-04-17

申请人： Russell W. Guenthner ,  Sidney L Andress ,  John Heath

发明人： Russell W. Guenthner ,  Sidney L Andress ,  John Heath

IPC分类号： G06F9/455

CPC分类号： G06F9/30043 ,  G06F9/30101 ,  G06F9/30174

摘要： Two unique instructions for the instruction set of a target 36-bit machine which is emulated on a host 64-bit machine are provided in order to achieve visibility, to an emulated application program, of a “containing” word stored in the memory of the host machine. A “LOAD64” instruction loads the emulator memory location representing an emulated “Q” (supplementary accumulator) register with the “normal” 36-bits of the containing word. At the same time, the “upper” 28 bits of the 64-bit containing word is copied into the emulator memory location representing an emulated “A” (accumulator) register. Thus, the emulated 36-bit machine “sees” and can examine the 64-bit word in its entirety. A “Store64” instruction stores the emulated “Q” register contents into the lower 36-bits of the 64-bit containing word, and at the same time stores the lower 28 bits of the emulated “A” register contents into the upper 28 bits of the 64-bit containing word.

摘要翻译： 提供了用于在主机64位机器上仿真的目标36位机器的指令集的两个唯一指令，以便实现模拟应用程序对存储在存储器中的“包含”字的可见性 主机。 “LOAD64”指令将模拟器存储位置加载到包含字的“正常”36位的模拟“Q”（补充累加器）寄存器中。 同时，64位包含字的“上”28位被复制到表示仿真“A”（累加器）寄存器的仿真器存储单元中。 因此，仿真的36位机器“看到”并且可以检查64位字的整体。 “Store64”指令将模拟的“Q”寄存器内容存储到64位包含字的低36位，同时将模拟的“A”寄存器内容的低28位存储到高位28位 的64位包含字。

公开(公告)号：US07406406B2

公开(公告)日：2008-07-29

申请号：US11006414

申请日：2004-12-07

申请人： Russell W. Guenthner ,  Sidney L. Andress ,  John E. Heath

发明人： Russell W. Guenthner ,  Sidney L. Andress ,  John E. Heath

IPC分类号： G06F9/44 ,  G06F9/455 ,  G06F12/00

CPC分类号： G06F9/30043 ,  G06F9/30101 ,  G06F9/30174

摘要： Two unique instructions for the instruction set of a target 36-bit machine which is emulated on a host 64-bit machine are provided in order to achieve visibility, to an emulated application program, of a “containing” word stored in the memory of the host machine. A “LOAD64” instruction loads the emulator memory location representing an emulated “Q” (supplementary accumulator) register with the “normal” 36-bits of the containing word. At the same time, the “upper” 28 bits of the 64-bit containing word is copied into the emulator memory location representing an emulated “A” (accumulator) register. Thus, the emulated 36-bit machine “sees” and can examine the 64-bit word in its entirety. A “Store64” instruction stores the emulated “Q” register contents into the lower 36-bits of the 64-bit containing word, and at the same time stores the lower 28 bits of the emulated “A” register contents into the upper 28 bits of the 64-bit containing word.

摘要翻译： 提供了用于在主机64位机器上仿真的目标36位机器的指令集的两个唯一指令，以便实现模拟应用程序对存储在存储器中的“包含”字的可见性 主机。 “LOAD64”指令将模拟器存储位置加载到包含字的“正常”36位的模拟“Q”（补充累加器）寄存器中。 同时，64位包含字的“上”28位被复制到表示仿真“A”（累加器）寄存器的仿真器存储单元中。 因此，仿真的36位机器“看到”并且可以检查64位字的整体。 “Store64”指令将模拟的“Q”寄存器内容存储到64位包含字的低36位，同时将仿真的“A”寄存器内容的低28位存储到高位28位 的64位包含字。

公开(公告)号：US06697959B2

公开(公告)日：2004-02-24

申请号：US09742457

申请日：2000-12-20

申请人： Sidney L. Andress ,  Wayne R. Buzby

发明人： Sidney L. Andress ,  Wayne R. Buzby

IPC分类号： G06F1107

CPC分类号： G06F11/0712 ,  G06F9/4812 ,  G06F11/0715 ,  G06F11/0724 ,  G06F11/0793 ,  G06F2209/481

摘要： A fault number is utilized by microcode fault handling to index into a fault array pointer table containing a plurality of pointers to entry descriptors describing fault handling routines. The pointer resulting from the indexing is utilized to retrieve an entry descriptor. The entry descriptor is verified and if valid, is utilized to setup the environment for the appropriate fault handling routine and to enter such. The fault array pointer table is located in a reserved memory that cannot be overwritten by I/O. During the boot process, the fault array pointer table entries, along with a fault-on-fault pointer are updated to point at entry descriptors stored in the reserved memory. Additionally, the fault-on-fault entry descriptor that rebuilds the processor environment if necessary from information in reserved memory.

摘要翻译： 通过微代码故障处理来利用故障编号来索引到包含描述故障处理例程的条目描述符的多个指针的故障数组指针表。 由索引产生的指针用于检索条目描述符。 验证入口描述符，如果有效，则用于为适当的故障处理例程设置环境并输入。 故障数组指针表位于不能被I / O覆盖的保留存储器中。 在引导过程中，故障数组指针表项以及故障故障指针被更新为指向存储在保留存储器中的入口描述符。 另外，故障条目描述符，如果需要，从预留的内存中的信息重建处理器环境。

公开(公告)号：US5862308A

公开(公告)日：1999-01-19

申请号：US869787

申请日：1997-06-05

申请人： Sidney L. Andress ,  Lowell D. McCulley

发明人： Sidney L. Andress ,  Lowell D. McCulley

IPC分类号： G06F11/07 ,  G06F9/00 ,  G06F11/22

CPC分类号： G06F11/0724 ,  G06F11/0793

摘要： A fault handling process in a computer system subject to CPU design errors and functioning under an operating system (OS) having an integral fault handling module includes the steps of: setting an intercept flag when a central processor fault occurs if the fault is to be directed to a preprocessor; establishing a safestore frame which includes information identifying the type of fault and whether the intercept flag is set; and transferring control to the OS fault handling module; then in the OS fault handling module, determining whether the intercept flag is set; if the intercept flag is not set, handling the fault in the OS fault module; if the intercept flag is set, transferring control from the OS fault module to an Intercept Process written in machine language; and handling the fault in the Intercept Process. This renders the resolution of faults due to correctable CPU design errors independent of the OS employed at a given installation and customizable to a given system without the need to revise the OS fault modules for each OS. As each such design error is worked out (e.g., by installing a substitute integrated circuit in which the error has been corrected), the Intercept Process (and CPU firmware) can be modified to remove monitoring and handling for faults due to the corrected error.

摘要翻译： 在具有整体故障处理模块的操作系统（OS）下遭受CPU设计错误和功能的计算机系统中的故障处理过程包括以下步骤：当故障要被引导时发生中央处理器故障时设置拦截标志 到预处理器 建立一个保险箱框架，其中包括识别故障类型的信息以及是否设置了拦截标志; 并将控制转移到OS故障处理模块; 然后在OS故障处理模块中，确定是否设置了拦截标志; 如果拦截标志未设置，则处理OS故障模块中的故障; 如果设置了拦截标志，则将控制从OS故障模块传送到以机器语言编写的拦截过程; 并处理拦截过程中的故障。 这使得由于可修正的CPU设计错误而导致的故障解决，独立于给定安装时使用的OS，并且可以自定义给给定的系统，而无需修改每个操作系统的操作系统故障模块。 由于每个这样的设计错误被解决（例如，通过安装错误已被校正的替换集成电路），可以修改截取过程（和CPU固件），以消除由于校正错误导致的故障的监视和处理。

公开(公告)号：US06779132B2

公开(公告)日：2004-08-17

申请号：US09943769

申请日：2001-08-31

申请人： Sidney L. Andress ,  Wayne R. Buzby

发明人： Sidney L. Andress ,  Wayne R. Buzby

IPC分类号： G06F1100

CPC分类号： G06F11/0793 ,  G06F11/0778

摘要： When a fault-on-fault condition arises in a data processing system which follows a backup fault procedure in the fault handling process, control is passed to dedicated firmware. Fault flags are reset and information vital to maintaining operating system control is sent to a reserved memory (which can be written to in limited circumstances) under firmware control. Control is then transferred to an Intercept process resident in the reserved memory which attempts to build a stable environment for the operating system to dump the system memory. If possible, a dump is taken, and a normal operating system restart is carried out. If not possible, a message with the vital fault information is issued, and a full manual restart must be taken. Even in the latter case, the fault information is available to help in determining the cause of the fault-on-fault.

摘要翻译： 当在故障处理过程中遵循备份故障过程的数据处理系统中出现故障故障状况时，将控制传递给专用固件。 故障标志被复位，对维护操作系统控制至关重要的信息在固件控制下发送到保留的存储器（可在有限的环境中写入）。 然后，控制被传送到驻留在保留的存储器中的拦截进程，其尝试为操作系统构建稳定的环境以转储系统存储器。 如果可能，将进行转储，并执行正常的操作系统重新启动。 如果不可能，将发出带有重要故障信息的消息，并且必须全面手动重新启动。 即使在后一种情况下，故障信息可用于帮助确定故障故障的原因。

公开(公告)号：US20080208562A1

公开(公告)日：2008-08-28

申请号：US12148205

申请日：2008-04-17

申请人： Russell W. Guenthner ,  Sidney L. Andress ,  John Heath

发明人： Russell W. Guenthner ,  Sidney L. Andress ,  John Heath

IPC分类号： G06F9/455

CPC分类号： G06F9/30043 ,  G06F9/30101 ,  G06F9/30174

摘要： Two unique instructions for the instruction set of a target 36-bit machine which is emulated on a host 64-bit machine are provided in order to achieve visibility, to an emulated application program, of a “containing” word stored in the memory of the host machine. A “LOAD64” instruction loads the emulator memory location representing an emulated “Q” (supplementary accumulator) register with the “normal” 36-bits of the containing word. At the same time, the “upper” 28 bits of the 64-bit containing word is copied into the emulator memory location representing an emulated “A” (accumulator) register. Thus, the emulated 36-bit machine “sees” and can examine the 64-bit word in its entirety. A “Store64” instruction stores the emulated “Q” register contents into the lower 36-bits of the 64-bit containing word, and at the same time stores the lower 28 bits of the emulated “A” register contents into the upper 28 bits of the 64-bit containing word.

摘要翻译： 提供了用于在主机64位机器上仿真的目标36位机器的指令集的两个唯一指令，以便实现模拟应用程序对存储在存储器中的“包含”字的可见性 主机。 “LOAD64”指令将模拟器存储位置加载到包含字的“正常”36位的模拟“Q”（补充累加器）寄存器中。 同时，64位包含字的“上”28位被复制到表示仿真“A”（累加器）寄存器的仿真器存储单元中。 因此，仿真的36位机器“看到”并且可以检查64位字的整体。 “Store64”指令将模拟的“Q”寄存器内容存储到64位包含字的低36位，同时将模拟的“A”寄存器内容的低28位存储到高位28位 的64位包含字。

公开(公告)号：US06687845B2

公开(公告)日：2004-02-03

申请号：US09742456

申请日：2000-12-20

申请人： Wayne R. Buzby ,  Sidney L. Andress

发明人： Wayne R. Buzby ,  Sidney L. Andress

IPC分类号： G06F1324

CPC分类号： G06F11/0724 ,  G06F9/4812 ,  G06F11/0715 ,  G06F11/0793 ,  G06F2209/481

摘要： A fault number is utilized by microcode fault handling to index into a fault array pointer table containing a plurality of pointers to entry descriptors describing fault handling routines. The pointer resulting from the indexing is utilized to retrieve an entry descriptor. The entry descriptor is verified and if valid, is utilized to setup the environment for the appropriate fault handling routine and to enter such. The fault array pointer table is located in a reserved memory that cannot be overwritten by I/O. During the boot process, the fault array pointer table entries, along with a fault-on-fault pointer are updated to point at entry descriptors stored in the reserved memory. Additionally, the fault-on-fault entry descriptor that rebuilds the processor environment if necessary from information in reserved memory.

摘要翻译： 通过微代码故障处理来利用故障编号来索引到包含描述故障处理例程的条目描述符的多个指针的故障数组指针表。 由索引产生的指针用于检索条目描述符。 验证入口描述符，如果有效，则用于为适当的故障处理例程设置环境并输入。 故障数组指针表位于不能被I / O覆盖的保留存储器中。 在引导过程中，故障数组指针表项以及故障故障指针被更新为指向存储在保留存储器中的入口描述符。 另外，故障条目描述符，如果需要，从预留的内存中的信息重建处理器环境。

公开(公告)号：US06574748B1

公开(公告)日：2003-06-03

申请号：US09596539

申请日：2000-06-16

申请人： Sidney L. Andress ,  Curtis D. Andes ,  Gerald E. Rightnour ,  James R. Smith

发明人： Sidney L. Andress ,  Curtis D. Andes ,  Gerald E. Rightnour ,  James R. Smith

IPC分类号： H02H305

CPC分类号： G06F11/2043 ,  G06F11/2025 ,  G06F11/203 ,  G06F11/2041

摘要： In a data processing system with multiple processors, failing processors are replaced with spare processors. This allows the system to continue to operate without degradation. An intercept process is notified of a processor failure so that it can collect processor registers and states. If the registers and states are collected correctly, an indication is set that relief is possible. The intercept process notifies a service processor of the failure and then halts the failed processor. The service processor then notifies the operating system of the failure and that relief is possible. If fast relief is acceptable, a spare processor is initialized and resumes execution with the state and registers of the failed processor. A service processor modeling file controls the number of active and spare processors in a system. Spare processors sharing the same L2 cache with the failed processor are preferred as replacements.

摘要翻译： 在具有多个处理器的数据处理系统中，故障处理器被替换为备用处理器。 这允许系统继续运行而不降级。 通知拦截进程处理器故障，以便它可以收集处理器寄存器和状态。 如果寄存器和状态被正确收集，则设置可以进行缓解的指示。 拦截过程通知服务处理器故障，然后停止故障处理器。 然后，服务处理器通知操作系统故障，并且可以进行缓解。 如果快速释放是可接受的，则会对备用处理器进行初始化，并使用故障处理器的状态和寄存器恢复执行。 服务处理器建模文件控制系统中的主动和备用处理器的数量。 与故障处理器共享相同L2缓存的备用处理器是替代品。