公开(公告)号：US06427026B1

公开(公告)日：2002-07-30

申请号：US09178198

申请日：1998-10-23

申请人： Soeren Hein ,  Wolfgang Meier ,  Norbert Wehn

发明人： Soeren Hein ,  Wolfgang Meier ,  Norbert Wehn

IPC分类号： G06K936

CPC分类号： H04N19/427 ,  H04N19/423 ,  H04N19/61

摘要： A decoder has a first memory for storing a coded first image. The image is stored in the first memory until it has been decoded at least twice. The results of the decoding operations can be supplied to a playback device. The invention makes it possible to dispense with an output frame buffer for the decoded first image, and thus only little memory is required in the decoder.

摘要翻译： 解码器具有用于存储经编码的第一图像的第一存储器。 图像被存储在第一个存储器中，直到它被解码至少两次。 可以将解码操作的结果提供给播放设备。 本发明使得可以省略用于解码的第一图像的输出帧缓冲器，因此在解码器中仅需要很少的存储器。

公开(公告)号：US6148049A

公开(公告)日：2000-11-14

申请号：US237696

申请日：1999-01-26

申请人： Soeren Hein

发明人： Soeren Hein

IPC分类号： H04N21/242 ,  H04N21/43 ,  H04L7/00 ,  G06F1/12 ,  H04J3/06

CPC分类号： H04N21/4302 ,  H04N21/242

摘要： A method for synchronization of a clock signal, which can be generated in a data receiving station, with a clock signal which is used in a data transmitting station. The synchronization is in each case carried out by evaluating a value and a time of received timemark data which represents a count that is dependent on the clock signal frequency in which the timemark data are transmitted to the data receiving station from the data transmitting station. The described method is distinguished by the fact that a parameter which characterizes the frequency of the clock signal of the data transmitting station is estimated in the data receiving station, at least partially taking into account the respective current timemark data and the previously received timemark data, and by the fact that a clock signal generator, which produces the clock signal to be synchronized, is triggered on the basis of the estimated value obtained in this way.

摘要翻译： 一种用于在数据接收站中产生的时钟信号与在数据发送站中使用的时钟信号同步的方法。 在每种情况下，通过评估表示依赖于从数据发送站将时标信号从数据接收站发送到时间信号频率的计数的接收到的标记数据的值和时间来执行同步。 所描述的方法的特征在于，在数据接收站中估计表征数据发送站的时钟信号的频率的参数，至少部分地考虑相应的当前时标信息和先前接收到的时标信息， 并且基于以这种方式获得的估计值来触发产生要同步的时钟信号的时钟信号发生器。

公开(公告)号：US5598159A

公开(公告)日：1997-01-28

申请号：US378256

申请日：1995-01-24

申请人： Soeren Hein

发明人： Soeren Hein

IPC分类号： H03H17/06 ,  H03M3/02 ,  H03M7/32 ,  H03M3/00

CPC分类号： H03H17/0664 ,  H03M3/462

摘要： In a method for fast decoding of the output signals of sigma delta modulators, the decoded output signal of a modulator is acquired using a sequence of iteration steps. In each step, two operations P.sub.1 or, respectively, P.sub.2 are thereby successively implemented, whereby the signals s are presented by components s(n), s(n-1), s(n-2), . . . , s(n-k) that are temporal samples of these signals. The operation P.sub.1 is a projection in the space of all input signals of the modulator onto the set of all of those input signals that the modulator images onto the output signal to be decoded. The operation P.sub.2 is a projection onto the sub-space of all band-limited input signals of the modulator. A presentation of the signals is selected for both operations wherein the operation P.sub.1 can be implemented component-by-component. This method is substantially faster (10.sup.4 -10.sup.5) than all known methods for decoding the output signals of sigma delta modulators with comparable precision and is only 2-10 times slower than substantially more imprecise, linear decoding methods. It can be employed in conjunction with all standard sigma delta architectures.

摘要翻译： 在用于对Σ-Δ调制器的输出信号进行快速解码的方法中，使用迭代步骤序列来获取调制器的解码输出信号。 在每个步骤中，由此分别执行两个操作P1或P2，由此分别由组件s（n），s（n-1），s（n-2）呈现信号s。 。 。 ，s（n-k），它们是这些信号的时间样本。 操作P1是调制器的所有输入信号的空间中的投影到所有这些输入信号的集合上，调制器将图像映射到要解码的输出信号上。 操作P2是在调制器的所有带限输入信号的子空间上的投影。 选择信号的呈现用于两个操作，其中操作P1可以逐个部件地实现。 该方法比用比较精度的Σ-Δ调制器的输出信号解码的所有已知方法要快得多（104-105），并且比实质上更精确的线性解码方法慢了2-10倍。 它可以与所有标准的Σ-Δ架构结合使用。