HIGH SIGNAL TO NOISE RATIO CAPACITIVE SENSING ANALOG FRONT-END
    1.
    发明申请
    HIGH SIGNAL TO NOISE RATIO CAPACITIVE SENSING ANALOG FRONT-END 有权
    高信号噪声比电容式传感模拟前端

    公开(公告)号:US20150145801A1

    公开(公告)日:2015-05-28

    申请号:US13619328

    申请日:2012-09-14

    IPC分类号: G06F3/044

    CPC分类号: G06F3/044 G06F3/0416

    摘要: Capacitance sensing circuits and methods are provided. The capacitance sensing circuit includes a capacitance-to-voltage converter configured to receive a signal from a capacitance to be sensed and to provide an output signal representative of the capacitance, an output chopper configured to convert the output signal of the capacitance-to-voltage converter to a sensed voltage representative of the capacitance to be sensed, an analog accumulator configured to accumulate sensed voltages during an accumulation period of NA sensing cycles and to provide an accumulated analog value, an amplifier configured to amplify the accumulated analog value, and an analog-to-digital converter configured to convert the amplified accumulated analog value to a digital value representative of the capacitance to be sensed. The analog accumulator may include a low pass filter having a frequency response to filter wideband noise.

    摘要翻译: 提供电容感测电路和方法。 电容感测电路包括:电容 - 电压转换器,被配置为从要感测的电容接收信号并提供表示电容的输出信号;输出斩波器,被配置为转换电容 - 电压的输出信号 转换器到感测的电压,代表要感测的电容;模拟累加器,被配置为在NA感测周期的累积周期期间累积感测电压并提供累加的模拟值,被配置为放大所累积的模拟值的放大器和模拟 配置为将放大的累积模拟值转换为表示要感测的电容的数字值。 模拟累加器可以包括具有对滤波器宽带噪声的频率响应的低通滤波器。

    Method for generating multiple incremental output voltages using a single charge pump chain
    2.
    发明授权
    Method for generating multiple incremental output voltages using a single charge pump chain 有权
    使用单个电荷泵链产生多个增量输出电压的方法

    公开(公告)号:US08030988B2

    公开(公告)日:2011-10-04

    申请号:US12651291

    申请日:2009-12-31

    IPC分类号: G05F1/10

    CPC分类号: H02M3/073 H02M2001/009

    摘要: A method and apparatus for generating multiple voltage level outputs from a single series of charge pump stages. The apparatus includes a plurality of voltage output circuits electrically connected in series. A selected number of the voltage output circuits include voltage output nodes that are available to be connected to loads. A control component in each voltage output circuit regulates operation of the charge pump stages within that circuit to provide a voltage level at the voltage output node regulated independently of other voltage output circuits in the series. The method and apparatus has the advantage of reducing the number of charge pump stages required to achieve a plurality of different voltage output levels. In another embodiment, the method and apparatus recycles charge within the apparatus by transferring charge between voltage output circuits through a load.

    摘要翻译: 一种从单个电荷泵级产生多个电压电平输出的方法和装置。 该装置包括串联电连接的多个电压输出电路。 所选数量的电压输出电路包括可用于连接到负载的电压输出节点。 每个电压输出电路中的控制部件调节该电路内的电荷泵级的操作,以在与该系列中的其它电压输出电路独立地调节的电压输出节点处提供电压电平。 该方法和装置具有减少实现多个不同电压输出电平所需的电荷泵级数的优点。 在另一个实施例中,该方法和装置通过在电压输出电路之间通过负载传送电荷来再循环装置内的电荷。

    High signal to noise ratio capacitive sensing analog front-end
    3.
    发明授权
    High signal to noise ratio capacitive sensing analog front-end 有权
    高信噪比电容式感应模拟前端

    公开(公告)号:US09128573B2

    公开(公告)日:2015-09-08

    申请号:US13619328

    申请日:2012-09-14

    IPC分类号: G06F3/044

    CPC分类号: G06F3/044 G06F3/0416

    摘要: Capacitance sensing circuits and methods are provided. The capacitance sensing circuit includes a capacitance-to-voltage converter configured to receive a signal from a capacitance to be sensed and to provide an output signal representative of the capacitance, an output chopper configured to convert the output signal of the capacitance-to-voltage converter to a sensed voltage representative of the capacitance to be sensed, an analog accumulator configured to accumulate sensed voltages during an accumulation period of NA sensing cycles and to provide an accumulated analog value, an amplifier configured to amplify the accumulated analog value, and an analog-to-digital converter configured to convert the amplified accumulated analog value to a digital value representative of the capacitance to be sensed. The analog accumulator may include a low pass filter having a frequency response to filter wideband noise.

    摘要翻译: 提供电容感测电路和方法。 电容感测电路包括:电容 - 电压转换器,被配置为从要感测的电容接收信号并提供表示电容的输出信号;输出斩波器,被配置为转换电容 - 电压的输出信号 转换器到感测的电压,代表要感测的电容;模拟累加器,被配置为在NA感测周期的累积周期期间累积感测电压并提供累加的模拟值,被配置为放大所累积的模拟值的放大器和模拟 配置为将放大的累积模拟值转换为表示要感测的电容的数字值。 模拟累加器可以包括具有对滤波器宽带噪声的频率响应的低通滤波器。

    Horizontal and vertical dynamic correction in CRT monitors
    4.
    发明授权
    Horizontal and vertical dynamic correction in CRT monitors 有权
    CRT显示器中的水平和垂直动态校正

    公开(公告)号:US07777432B2

    公开(公告)日:2010-08-17

    申请号:US10529974

    申请日:2002-09-30

    IPC分类号: H01J29/56

    CPC分类号: H04N3/26

    摘要: A device and method for generation of a dynamic focus correction signal for use with a CRT that includes an analog scanning processor for generating a dynamic focus correction signal that is proportional to Kx2+(1−K)x4, where x is the distance from a mid point of a viewing surface of the CRT, and K is a real number in the range 0.00 to 1.00. Embodiments of the invention find particular use in CRTs having generally flatter, squarer configurations.

    摘要翻译: 一种用于生成与CRT一起使用的动态聚焦校正信号的装置和方法,该CRT包括用于产生与Kx2 +(1-K)x4成比例的动态聚焦校正信号的模拟扫描处理器,其中x是从中间 CRT的观察面的点,K是0.00〜1.00的实数。 本发明的实施例在具有通常较平坦,平方的配置的CRT中特别有用。

    COMPENSATION FOR VARIATIONS IN A CAPACITIVE SENSE MATRIX
    5.
    发明申请
    COMPENSATION FOR VARIATIONS IN A CAPACITIVE SENSE MATRIX 有权
    电容式感应矩阵中变量的补偿

    公开(公告)号:US20140092050A1

    公开(公告)日:2014-04-03

    申请号:US13629877

    申请日:2012-09-28

    IPC分类号: G06F3/044

    摘要: A readout device for a capacitive sense matrix includes a computer readable storage medium configured to store capacitance data. The capacitance data represents capacitance values of the capacitive sense matrix. The readout device also includes a readout circuit configured to receive a signal from the capacitive sense matrix, the readout circuit being configured based upon the capacitance data. Also described are a readout method and a method of compensating for variations in capacitance.

    摘要翻译: 用于电容性感测矩阵的读出装置包括被配置为存储电容数据的计算机可读存储介质。 电容数据表示电容性感测矩阵的电容值。 读出装置还包括被配置为从电容性感测矩阵接收信号的读出电路,读出电路基于电容数据配置。 还描述了补偿电容变化的读出方法和方法。

    ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT
    6.
    发明申请
    ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT 有权
    静电放电保护电路

    公开(公告)号:US20100157493A1

    公开(公告)日:2010-06-24

    申请号:US12343746

    申请日:2008-12-24

    IPC分类号: H02H9/00

    CPC分类号: H01L27/0285

    摘要: An integrated circuit includes an electrostatic discharge (ESD) detection circuit which detects an ESD event and generates an event signal. In response to that event signal, a control circuit controls the operation of a buffer circuit to function in an additional mode wherein the normal differential operation of the buffer circuit is disabled and the buffer circuit is instead configured to form a conduction path between supply rails to discharge the ESD event. Preferably, a plurality of buffer circuits are driven in parallel by the control circuit to function in the additional mode to form parallel discharge paths for the ESD event. Multiple ESD detection circuits may be provided, and any one of those detection circuits can trigger the control circuitry to place all of the buffer circuits in the additional mode.

    摘要翻译: 集成电路包括检测ESD事件并产生事件信号的静电放电(ESD)检测电路。 响应于该事件信号,控制电路控制缓冲电路的操作以其它模式工作,其中禁止缓冲电路的正常差分操作,并且缓冲电路被配置为在电源轨之间形成导通路径 放电ESD事件。 优选地,多个缓冲电路由控制电路并联驱动以在附加模式中起作用以形成ESD事件的并行放电路径。 可以提供多个ESD检测电路,并且这些检测电路中的任何一个可以触发控制电路将所有缓冲电路放置在附加模式中。

    Compensation for variations in a capacitive sense matrix
    7.
    发明授权
    Compensation for variations in a capacitive sense matrix 有权
    电容式感应矩阵的变化补偿

    公开(公告)号:US09223448B2

    公开(公告)日:2015-12-29

    申请号:US13629877

    申请日:2012-09-28

    IPC分类号: G06F3/044 G06F3/041

    摘要: A readout device for a capacitive sense matrix includes a computer readable storage medium configured to store capacitance data. The capacitance data represents capacitance values of the capacitive sense matrix. The readout device also includes a readout circuit configured to receive a signal from the capacitive sense matrix, the readout circuit being configured based upon the capacitance data. Also described are a readout method and a method of compensating for variations in capacitance.

    摘要翻译: 用于电容性感测矩阵的读出装置包括被配置为存储电容数据的计算机可读存储介质。 电容数据表示电容性感测矩阵的电容值。 读出装置还包括被配置为从电容性感测矩阵接收信号的读出电路,读出电路基于电容数据配置。 还描述了补偿电容变化的读出方法和方法。

    Electrostatic discharge protection circuit
    8.
    发明授权
    Electrostatic discharge protection circuit 有权
    静电放电保护电路

    公开(公告)号:US08705217B2

    公开(公告)日:2014-04-22

    申请号:US12343746

    申请日:2008-12-24

    IPC分类号: H02H9/00

    CPC分类号: H01L27/0285

    摘要: An integrated circuit includes an electrostatic discharge (ESD) detection circuit which detects an ESD event and generates an event signal. In response to that event signal, a control circuit controls the operation of a buffer circuit to function in an additional mode wherein the normal differential operation of the buffer circuit is disabled and the buffer circuit is instead configured to form a conduction path between supply rails to discharge the ESD event. Preferably, a plurality of buffer circuits are driven in parallel by the control circuit to function in the additional mode to form parallel discharge paths for the ESD event. Multiple ESD detection circuits may be provided, and any one of those detection circuits can trigger the control circuitry to place all of the buffer circuits in the additional mode.

    摘要翻译: 集成电路包括检测ESD事件并产生事件信号的静电放电(ESD)检测电路。 响应于该事件信号,控制电路控制缓冲电路的操作以其它模式工作,其中禁止缓冲电路的正常差分操作,并且缓冲电路被配置为在电源轨之间形成导通路径 放电ESD事件。 优选地,多个缓冲电路由控制电路并联驱动以在附加模式中起作用以形成ESD事件的并行放电路径。 可以提供多个ESD检测电路,并且这些检测电路中的任何一个可以触发控制电路将所有缓冲电路放置在附加模式中。

    METHOD FOR GENERATING MULTIPLE INCREMENTAL OUTPUT VOLTAGES USING A SINGLE CHARGE PUMP CHAIN
    9.
    发明申请
    METHOD FOR GENERATING MULTIPLE INCREMENTAL OUTPUT VOLTAGES USING A SINGLE CHARGE PUMP CHAIN 有权
    使用单电荷泵链产生多路输出电压的方法

    公开(公告)号:US20110156803A1

    公开(公告)日:2011-06-30

    申请号:US12651291

    申请日:2009-12-31

    IPC分类号: G05F1/10

    CPC分类号: H02M3/073 H02M2001/009

    摘要: A method and apparatus for generating multiple voltage level outputs from a single series of charge pump stages. The apparatus includes a plurality of voltage output circuits electrically connected in series. A selected number of the voltage output circuits include voltage output nodes that are available to be connected to loads. A control component in each voltage output circuit regulates operation of the charge pump stages within that circuit to provide a voltage level at the voltage output node regulated independently of other voltage output circuits in the series. The method and apparatus has the advantage of reducing the number of charge pump stages required to achieve a plurality of different voltage output levels. In another embodiment, the method and apparatus recycles charge within the apparatus by transferring charge between voltage output circuits through a load.

    摘要翻译: 一种从单个电荷泵级产生多个电压电平输出的方法和装置。 该装置包括串联电连接的多个电压输出电路。 所选数量的电压输出电路包括可用于连接到负载的电压输出节点。 每个电压输出电路中的控制部件调节该电路内的电荷泵级的操作,以在与该系列中的其它电压输出电路独立地调节的电压输出节点处提供电压电平。 该方法和装置具有减少实现多个不同电压输出电平所需的电荷泵级数的优点。 在另一个实施例中,该方法和装置通过在电压输出电路之间通过负载传送电荷来再循环装置内的电荷。

    Circuit, method and system for generating a non-linear transfer characteristic
    10.
    发明授权
    Circuit, method and system for generating a non-linear transfer characteristic 有权
    用于产生非线性传输特性的电路,方法和系统

    公开(公告)号:US07161411B2

    公开(公告)日:2007-01-09

    申请号:US10467754

    申请日:2001-02-20

    IPC分类号: G05F1/10 G05F3/16

    CPC分类号: G06G7/28

    摘要: A circuit, method and system for generating a non-linear transfer characteristic, including a plurality of current mirror circuits in parallel, each current mirror circuit having an offset current applied to an output terminal of an output-side transistor of the current mirror circuit for controlling an output current thereof, wherein the offset current of each current mirror circuit is set to a respective predetermined level, and the transfer characteristic is generated by summing the respective output currents of the current mirror circuits in a piece-wise manner.

    摘要翻译: 一种用于产生并联的多个电流镜电路的非线性传递特性的电路,方法和系统,每个电流镜电路具有施加到电流镜电路的输出侧晶体管的输出端的偏移电流, 控制其输出电流,其中每个电流镜电路的偏移电流被设置为相应的预定电平,并且通过以分段方式对电流镜电路的相应输出电流求和来产生传递特性。