摘要:
An input analog image signal is sampled by first and second A/D converters, using first and second sampling clocks of the same period, to obtain digital gradation data. In the case of a double definition display mode, the first and second sampling clocks are made 180.degree. out of phase with each other and the output of the first A/D converter is delayed for one-half period, by which its timing is brought into agreement with that of the output of the second A/D converter, thus obtaining a pair of digital gradation data. In the case of a standard definition display mode, the first and second sampling clocks of the same phase are used to obtain the outputs of the first and second A/D converters as a pair of digital gradation data. The pair of digital gradation data Da and Db is converted by a signal processing part into a pair of analog gradation data Aa and Ab, which is subjected to a serial-to-parallel conversion by a source driver to be supplied in parallel to data lines. In the double definition display mode the gate driver sequentially drives odd-numbered row lines in odd-numbered frames and even-numbered row lines in even-numbered frames. In the standard definition display mode every two adjacent row lines are simultaneously driven in a sequential order.
摘要:
An image of a text displayed on a flat display is reflected by a half mirror so that a speaker is allowed to see the reflected image in the direction in which he faces the audience. A document of the text to be displayed is prepared as character code data of a frame configuration, and a display controller controls the scroll or page updating of the display screen in accordance with a control instruction from a control panel.
摘要:
In an active matrix structure for liquid crystal display elements which includes pixel electrodes arranged in a matrix form on a glass base plate, thin film transistors having their drains connected to the pixel electrodes, respectively, data lines each connected to sources of the thin film transistors of one column and gate lines connected to gates of the thin film transistors of one row, there are provided in the same plane a light blocking layer disposed opposite each of the thin film transistors across an insulating layer, a storage capacitance electrode disposed partly opposite each of the pixel electrodes across the insulating layer and storage capacitance lines for interconnecting the capacitance electrodes. The light blocking layers, the storage capacitance electrodes and the storage capacitance lines are formed of the same material and at the same time.