公开(公告)号：US5981984A

公开(公告)日：1999-11-09

申请号：US951863

申请日：1997-10-16

申请人： Tadayoshi Iwaana ,  Yuichi Harada ,  Noriyuki Iwamuro

发明人： Tadayoshi Iwaana ,  Yuichi Harada ,  Noriyuki Iwamuro

IPC分类号： H01L29/74 ,  H01L29/745 ,  H01L29/749 ,  H01L29/739

CPC分类号： H01L29/749 ,  H01L29/7455

摘要： An insulated gate thyristor includes a first-conductivity-type base layer having a high resistivity, first and second second-conductivity-type base regions formed in a surface layer of the first-conductivity-type base layer, a first-conductivity-type source region formed in a surface layer of the first second-conductivity-type base region, and a first-conductivity-type emitter region formed in a surface layer of the second second-conductivity-type base region. The thyristor further includes a gate electrode layer formed on an insulating film over the first second-conductivity-type base region, an exposed portion of the first-conductivity-type base layer and the second second-conductivity-type base region, a first main electrode that contacts both the first second-conductivity-type base layer and first-conductivity-type source region, a second-conductivity-type emitter layer formed on the first-conductivity-type base layer, a second main electrode that contacts the second-conductivity-type emitter layer, a gate electrode that contacts the gate electrode layer, and an insulating film covering entire areas of surfaces of the second second-conductivity-type base region and first-conductivity-type emitter region. In this insulated gate thyristor, the first-conductivity-type base layer includes a locally narrowed portion which is interposed between the first and second second-conductivity-type base regions.

摘要翻译： 绝缘栅晶闸管包括第一导电型基极层，其具有形成在第一导电型基极层的表面层中的高电阻率，第一和第二第二导电型基极区域，第一导电型源极 形成在第一第二导电型基极区域的表面层中的第一导电型发射极区域和形成在第二第二导电型基极区域的表面层中的第一导电型发射极区域。 所述晶闸管还包括形成在所述第一第二导电型基极区域上的绝缘膜上的栅极电极层，所述第一导电型基极层和所述第二第二导电型基极区域的露出部分， 电极，其与第一第二导电型基极层和第一导电型源极区域接触;第二导电型发射极层，形成在第一导电型基极层上;第二主电极， 导电型发射极层，与栅极电极层接触的栅极电极以及覆盖第二第二导电型基极区域和第一导电型发射极区域的整个表面的绝缘膜。 在该绝缘栅极晶闸管中，第一导电型基极层包括介于第一和第二第二导电型基极区域之间的局部变窄部分。

公开(公告)号：US06278140B1

公开(公告)日：2001-08-21

申请号：US09511167

申请日：2000-02-24

申请人： Yuichi Harada ,  Noriyuki Iwamuro ,  Tadayoshi Iwaana

发明人： Yuichi Harada ,  Noriyuki Iwamuro ,  Tadayoshi Iwaana

IPC分类号： H01L2974

CPC分类号： H01L29/0692 ,  H01L29/7455 ,  H01L29/749

摘要： An insulated gate thyristor is provided which includes: a first-conductivity-type base layer, first and second-conductivity-type base regions formed in the base layer, a first-conductivity-type source region formed in the first base region, a first-conductivity-type emitter region formed in the second base region, and a gate electrode layer formed on a gate insulating film over the first base region, first-conductivity-type base layer, and second base region, which are interposed between the first-conductivity-type source region and the first-conductivity-type emitter region. The thyristor further includes a first main electrode that contacts with both the first base region and the first-conductivity-type source region, a second-conductivity-type emitter layer formed on the other surface of the first-conductivity-type base layer, a second main electrode that contacts with the second-conductivity-type emitter layer, a gate electrode connected to the gate electrode layer; and an insulating film covering entire surface areas of the second second-conductivity-type base region and the first-conductivity-type emitter region. In this insulated gate thyristor, an exposed surface portion of the first second-conductivity-type base region that is interposed between the first-conductivity-type base layer and the first-conductivity-type source region has a smaller width than an exposed surface portion of the second second-conductivity-type base region interposed between the first-conductivity-type base layer and the first-conductivity-type emitter region.

摘要翻译： 提供了一种绝缘栅极晶闸管，其包括：第一导电型基极层，形成在基极层中的第一和第二导电型基极区域，形成在第一基极区域中的第一导电型源极区域， 形成在第二基极区域中的导电型发射极区域和形成在第一基极区域上的栅极绝缘膜上的栅电极层，第一导电型基极层和第二基极区域， 导电型源极区域和第一导电型发射极区域。 晶闸管还包括与第一基极区域和第一导电型源极区域接触的第一主电极，形成在第一导电型基极层的另一个表面上的第二导电型发射极层， 与第二导电型发射极层接触的第二主电极，连接到栅电极层的栅电极; 以及覆盖所述第二第二导电型基极区域和所述第一导电型发射极区域的整个表面区域的绝缘膜。 在该绝缘栅极晶闸管中，介于第一导电型基极层和第一导电型源极区域之间的第一第二导电型基极区域的露出面部分的宽度比露出面部分 位于第一导电型基极层和第一导电型发射极区域之间的第二第二导电型基极区域。

公开(公告)号：US6091087A

公开(公告)日：2000-07-18

申请号：US852269

申请日：1997-05-06

申请人： Noriyuki Iwamuro ,  Yuichi Harada ,  Tadayoshi Iwaana

发明人： Noriyuki Iwamuro ,  Yuichi Harada ,  Tadayoshi Iwaana

IPC分类号： H01L29/745 ,  H01L29/749 ,  H01L29/74 ,  H01L29/00

CPC分类号： H01L29/7455 ,  H01L29/749

摘要： An insulated gate thyristor includes a first-conductivity-type base layer having a high resistivity, first and second second-conductivity-type base regions formed in a surface layer of the first-conductivity-type base layer, a first-conductivity-type source region formed in a surface layer of the first second-conductivity-type base region, and a first-conductivity-type emitter region formed in a surface layer of the second second-conductivity-type base region. The thyristor further includes a gate electrode formed through an insulating film on the first second-conductivity-type base region, an exposed portion of the first-conductivity-type base layer and the second second-conductivity-type base region, a first main electrode that contacts both the first second-conductivity-type base layer and first-conductivity-type source region, a second-conductivity-type emitter layer formed on the first-conductivity-type base layer, a second main electrode that contacts the second-conductivity-type emitter layer, and an insulating film covering entire areas of surfaces of the second second-conductivity-type base region and first-conductivity-type emitter region. The second second-conductivity-type base region has a diffusion depth that is greater than a larger one of diffusion depths of the first second-conductivity-type base region and a second-conductivity-type well region included in the first second-conductivity-type base region.

摘要翻译： 绝缘栅晶闸管包括第一导电型基极层，其具有形成在第一导电型基极层的表面层中的高电阻率，第一和第二第二导电型基极区域，第一导电型源极 形成在第一第二导电型基极区域的表面层中的第一导电型发射极区域和形成在第二第二导电型基极区域的表面层中的第一导电型发射极区域。 晶闸管还包括通过第一第二导电型基极区域上的绝缘膜形成的栅电极，第一导电型基极层和第二第二导电型基极区域的露出部分，第一主电极 其与第一导电型基极层和第一导电型源极区域接触，形成在第一导电型基极层上的第二导电型发射极层，与第二导电型基极层接触的第二主电极 型发射极层和覆盖第二第二导电型基极区域和第一导电型发射极区域的整个表面的绝缘膜。 所述第二第二导电型基区具有比所述第一第二导电型基区的扩散深度大的扩散深度和包含在所述第一第二导电型基极区中的第二导电型阱区的扩散深度。 型基地区。

公开(公告)号：US6054728A

公开(公告)日：2000-04-25

申请号：US54946

申请日：1998-04-03

申请人： Yuichi Harada ,  Noriyuki Iwamuro ,  Tadayoshi Iwaana

发明人： Yuichi Harada ,  Noriyuki Iwamuro ,  Tadayoshi Iwaana

IPC分类号： H01L29/74 ,  H01L29/06 ,  H01L29/745 ,  H01L29/749 ,  H01L31/111

CPC分类号： H01L29/0692 ,  H01L29/7455 ,  H01L29/749

摘要： An insulated gate thyristor is provided which includes: a first-conductivity-type base layer, first and second second-conductivity-type base regions formed in the base layer, a first-conductivity-type source region formed in the first base region, a first-conductivity-type emitter region formed in the second base region, and a gate electrode layer formed on a gate insulating film over the first base region, first-conductivity-type base layer, and second base region, which are interposed between the first-conductivity-type source region and the first-conductivity-type emitter region. The thyristor further includes a first main electrode that contacts with both the first base region and the first-conductivity-type source region, a second-conductivity-type emitter layer formed on the other surface of the first-conductivity-type base layer, a second main electrode that contacts with the second-conductivity-type emitter layer, a gate electrode connected to the gate electrode layer; and an insulating film covering entire surface areas of the second second-conductivity-type base region and the first-conductivity-type emitter region. In this insulated gate thyristor, an exposed surface portion of the first second-conductivity-type base region that is interposed between the first-conductivity-type base layer and the first-conductivity-type source region has a smaller width than an exposed surface portion of the second second-conductivity-type base region interposed between the first-conductivity-type base layer and the first-conductivity-type emitter region.

摘要翻译： 提供了一种绝缘栅晶闸管，其包括：第一导电型基极层，形成在基极层中的第一和第二第二导电型基极区域，形成在第一基极区域中的第一导电型源极区域， 形成在第二基极区域中的第一导电型发射极区域和形成在第一基极区域上的栅极绝缘膜上的栅极电极层，第一导电型基极层和第二基极区域， 导电型源极区域和第一导电型发射极区域。 晶闸管还包括与第一基极区域和第一导电型源极区域接触的第一主电极，形成在第一导电型基极层的另一个表面上的第二导电型发射极层， 与第二导电型发射极层接触的第二主电极，连接到栅电极层的栅电极; 以及覆盖所述第二第二导电型基极区域和所述第一导电型发射极区域的整个表面区域的绝缘膜。 在该绝缘栅极晶闸管中，介于第一导电型基极层和第一导电型源极区域之间的第一第二导电型基极区域的露出面部分的宽度比露出面部分 位于第一导电型基极层和第一导电型发射极区域之间的第二第二导电型基极区域。

公开(公告)号：US06242967B1

公开(公告)日：2001-06-05

申请号：US09333224

申请日：1999-06-15

申请人： Noriyuji Iwamuro ,  Hisao Shigekane ,  Yuichi Harada ,  Tadayoshi Iwaana

发明人： Noriyuji Iwamuro ,  Hisao Shigekane ,  Yuichi Harada ,  Tadayoshi Iwaana

IPC分类号： H03K1760

CPC分类号： H03K17/567 ,  H01L27/0623 ,  H03K17/04126 ,  H03K17/615

摘要： A semiconductor device is provided which includes a first unipolar transistor provided in a front stage of the device, second unipolar transistor provided in the front stage, and a bipolar transistor provided in a rear stage of the device. In this semiconductor device, drain and the source of the first unipolar transistor are connected to collector and the base of the bipolar transistor, respectively, and drain and the source of the second unipolar transistor are connected to emitter and base of the bipolar transistor, respectively.

摘要翻译： 提供了一种半导体器件，其包括设置在器件的前级中的第一单极晶体管，设置在前级中的第二单极晶体管，以及设置在器件的后级中的双极晶体管。 在该半导体器件中，第一单极晶体管的漏极和源极分别连接到双极晶体管的集电极和基极，漏极和第二单极晶体管的源极分别连接到双极晶体管的发射极和基极 。

公开(公告)号：US5874751A

公开(公告)日：1999-02-23

申请号：US626335

申请日：1996-04-02

申请人： Noriyuki Iwamuro ,  Yuichi Harada ,  Tadayoshi Iwaana

发明人： Noriyuki Iwamuro ,  Yuichi Harada ,  Tadayoshi Iwaana

IPC分类号： H01L29/744 ,  H01L29/06 ,  H01L29/739 ,  H01L29/74 ,  H01L29/745 ,  H01L29/749 ,  H01L29/78 ,  H01L29/87

CPC分类号： H01L29/749 ,  H01L29/0692 ,  H01L29/7455

摘要： An insulated gate thyristor is provided which includes a first-conductivity-type base layer of high resistivity, first and second second-conductivity-type base regions formed in a surface layer of a first major surface of the first-conductivity-type base layer, a first-conductivity-type source region formed in a surface layer of the first second-conductivity-type base region, a first-conductivity-type emitter region formed in a surface layer of the second second-conductivity-type base region, a gate electrode formed on surfaces of the first second-conductivity-type base region, the first-conductivity-type base layer, and the second second-conductivity-type base region, which surfaces are interposed between the first-conductivity-type source region and the first-conductivity-type emitter region, an insulating film interposed between the gate electrode and these surface of the base regions and layer, a first main electrode in contact with both the first second-conductivity-type base region and the first-conductivity-type source region, a second-conductivity-type emitter layer formed on a second major surface of the first-conductivity-type base layer, and a second main electrode in contact with the second-conductivity-type emitter layer. The entire surface areas of the second second-conductivity-type base region and the first-conductivity-type emitter region are covered with the insulating film.

摘要翻译： 提供一种绝缘栅极晶闸管，其包括形成在第一导电型基极层的第一主表面的表面层中的高电阻率第一和第二第二导电型基极的第一导电型基极层， 形成在第一第二导电型基极区域的表面层中的第一导电型源极区域，形成在第二第二导电型基极区域的表面层中的第一导电型发射极区域，栅极 形成在第一导电型基极区域，第一导电型基极层和第二第二导电型基极区域的表面上的电极，其表面插入在第一导电型源极区域和第二导电型基极区域之间， 第一导电型发射极区域，介于栅电极与基极区域和层的这些表面之间的绝缘膜，与第一第二导电型基极区相接触的第一主电极 所述第一导电型源极区和所述第一导电型源区，形成在所述第一导电型基极层的第二主表面上的第二导电型发射极层和与所述第二导电型发射极接触的第二主电极 层。 第二第二导电型基极区域和第一导电型发射极区域的整个表面积被绝缘膜覆盖。