摘要:
An output converter includes a DCDC conversion section, a secondary side voltage/current monitoring section detecting a power from the DCDC conversion section, a maximum operation point control section determining what voltage is to be set by the DCDC conversion section so that the power detected by the secondary side voltage/current monitoring section is maximum, a DCDC short-circuit switch via which a current from a module bypasses the DCDC conversion section to outside, a primary side voltage/current monitoring section measuring the current from the module, a module short-circuit switch switching between a state where a secondary side cathode and a secondary side anode are short-circuited and a state where they are not short-circuited, the maximum operation point control section causing the DCDC short-circuit switch and the module short-circuit switch to switch.
摘要:
An information processing apparatus includes a battery for providing the interior of the information processing apparatus with power; a volatile memory for storing data; a nonvolatile memory for backupping the data stored in the volatile memory; a controller for controlling backup of the data in accordance with a process comprising the steps of: saving the data into the nonvolatile memory; upon recovery of the power from the external power source, writing back the data into the volatile memory; and deleting the data saved in the nonvolatile memory; wherein when the power from an external power source to the information processing apparatus is stopped during deleting data in the nonvolatile memory, the controller selectively writes back deleted data from the volatile memory into the nonvolatile memory.
摘要:
A backup method makes a backup of cache data to a nonvolatile memory by using a controller, the cache data being stored in the volatile memory. The backup method includes writing the cache data stored in the volatility memory in a selected area of the nonvolatile memory, generating party data by operating the parity operations between each of the predetermined parts of the cache data in the volatile memory, verifying whether an error found in the part of the cache data in the nonvolatile memory can be recovered by using the parity data, and rewriting the part of the cache data when the error found in the part of the cache data in the nonvolatile memory cannot be recovered by using the parity data in an area of the nonvolatile memory different from the selected area.
摘要:
An information processing apparatus includes a controller, a plurality of electric power supply units and a backup electric power supply unit that supply electric power to the controller. The controller detects a malfunction occurring in the plurality of electric power supply units, stops electric power supply from the plurality of electric power supply units, starts electric power supply from the backup electric power supply unit when a malfunction is detected, identifies an electric power supply unit having a malfunction from the plurality of electric power supply units, disconnects the identified electric power supply unit, resumes electric power supply from an electric power supply unit determined to function normally and stops the electric power supply from the backup electric power supply unit when the electric power supply unit having the malfunction is disconnected.
摘要:
A storage system includes a housing, a cooling unit cooling the interior of the housing, and a plurality of control units adapted to control the cooling unit. The control units each include a mount state acquisition unit acquiring a mount state of the control unit in the housing, an operation state acquisition unit acquiring an operation state of the cooling unit, and a determining unit determining a provisional main control unit, from among the plurality of control units, that is operable to control the entire cooling unit based on information acquired from the mount state acquisition unit and the operation state acquisition unit.
摘要:
In an LSI implemented by a DMA chip, a BCC check block performs BCC check of cache data each time the cache data is read. In response to a check result indicating whether or not the check is completed, a CM read block turns on a BCC check bit and a BCC error bit of a data-transfer-end notification. Further, an FCC check block performs FCC check of the cache data. In response to a check result indicating whether or not the check is completed, the CM read block turns on an FCC check bit and an FCC error bit of the data-transfer-end notification. When data transfer is finished, the CM read block sends the data-transfer-end notification to a CPU via a descriptor block.
摘要:
A storage system includes a housing, a cooling unit cooling the interior of the housing, and a plurality of control units adapted to control the cooling unit. The control units each include a mount state acquisition unit acquiring a mount state of the control unit in the housing, an operation state acquisition unit acquiring an operation state of the cooling unit, and a determining unit determining a provisional main control unit, from among the plurality of control units, that is operable to control the entire cooling unit based on information acquired from the mount state acquisition unit and the operation state acquisition unit.
摘要:
Radial cross sections of front sides in rotational direction of impellers attached to a pump shaft obliquely to a circumferential direction from an upstream side toward a downstream side have concave shapes protruding toward the upstream side, and radial cross sections of rear sides in rotational direction of the impellers have concave shapes protruding toward the downstream side.
摘要:
A bus communication apparatus and a bus communication method are provided, in which data transfer via a bus is not interrupted and no noise is generated in any signal on the bus. The apparatus comprises a bus signal terminal that can be connected to the bus of the external apparatus; a device that communicates with the external apparatus through the bus; a driver that is connected at an input terminal to the bus signal terminal and at an output terminal to the device, has an input impedance much higher than the impedance that the bus signal terminal has with respect to the input terminal and an output impedance much lower than the impedance that the device has with respect to the output terminal, and operates in order to decrease a potential difference between the input terminal and the output terminal; a switch that connects the bus signal terminal to the device; and a control unit that instructs the driver to start operating, then instructs the switch to perform connection and instructs the driver to stop operating, after the bus signal terminal is connected to the external apparatus.
摘要:
A transfer-indication storage unit indicates an address and a data length of data to be transferred by a DMA circuit. An expected value table refers to a transfer indication of the transfer-indication storage unit and stores therein expected values of the address and the data length of the data to be transferred. A transfer-monitoring unit retrieves tag data and a data length of data in a bus. Based on the data length and the tag data notified by the transfer-monitoring unit, a table updating unit updates a start address and the data length in the expected value table. A determining unit determines whether the start address, corresponding to the DMA circuit after data transfer, matches with an end address, and further determines whether the data length has become zero.