公开(公告)号：US5406098A

公开(公告)日：1995-04-11

申请号：US285307

申请日：1994-08-03

Applicant: Fumiaki Hyuga ,  Kenji Shiojima ,  Tatsuo Aoki ,  Kazuyoshi Asai ,  Masami Tokumitsu ,  Kazumi Nishimura ,  Yasuro Yamane

Inventor： Fumiaki Hyuga ,  Kenji Shiojima ,  Tatsuo Aoki ,  Kazuyoshi Asai ,  Masami Tokumitsu ,  Kazumi Nishimura ,  Yasuro Yamane

IPC: H01L21/335 ,  H01L21/8252 ,  H01L27/06 ,  H01L29/08 ,  H01L29/80

CPC classification number: H01L29/66462 ,  H01L21/8252 ,  H01L27/0605 ,  H01L29/0891 ,  H01L29/802

Abstract: A semiconductor circuit device is disclosed in which an impurity ion implanted region is formed in a substrate, a Schottky junction type gate electrode is formed above the impurity ion implanted region, and a source electrode and a drain electrode are formed on both sides of the gate electrode. In this device, an InGaP barrier layer is formed between the substrate and the electrodes, a cap layer comprising a semiconductor free from In as a constituent is formed between the InGaP barrier layer and the electrodes, and the gate electrode is formed of a refractory metal.

Abstract translation: 公开了半导体电路器件，其中在衬底中形成杂质离子注入区，在杂质离子注入区上方形成肖特基结型栅电极，并且在栅极的两侧形成源电极和漏电极 电极。 在该器件中，在衬底和电极之间形成InGaP阻挡层，在InGaP阻挡层和电极之间形成包含不含In的半导体的覆盖层，栅电极由难熔金属 。

公开(公告)号：US5369043A

公开(公告)日：1994-11-29

申请号：US171396

申请日：1993-12-22

Applicant: Fumiaki Hyuga ,  Kenji Shiojima ,  Tatsuo Aoki ,  Kazuyoshi Asai ,  Masami Tokumitsu ,  Kazumi Nishimura ,  Yasuro Yamane

Inventor： Fumiaki Hyuga ,  Kenji Shiojima ,  Tatsuo Aoki ,  Kazuyoshi Asai ,  Masami Tokumitsu ,  Kazumi Nishimura ,  Yasuro Yamane

IPC: H01L21/335 ,  H01L21/8252 ,  H01L27/06 ,  H01L29/08 ,  H01L29/80 ,  H01L21/265

CPC classification number: H01L29/66462 ,  H01L21/8252 ,  H01L27/0605 ,  H01L29/0891 ,  H01L29/802

Abstract: A semiconductor circuit device is disclosed in which an impurity ion implanted region is formed in a substrate, a Schottky junction type gate electrode is formed above the impurity ion implanted region, and a source electrode and a drain electrode are formed on both sides of the gate electrode. In this device, an InGaP barrier layer is formed between the substrate and the electrodes, a cap layer comprising a semiconductor free from In as a constituent is formed between the InGaP barrier layer and the electrodes, and the gate electrode is formed of a refractory metal.

Abstract translation: 公开了半导体电路器件，其中在衬底中形成杂质离子注入区，在杂质离子注入区上方形成肖特基结型栅电极，并且在栅极的两侧形成源电极和漏电极 电极。 在该器件中，在衬底和电极之间形成InGaP阻挡层，在InGaP阻挡层和电极之间形成包含不含In的半导体的覆盖层，栅电极由难熔金属 。