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公开(公告)号：US07474161B2
公开(公告)日：2009-01-06
申请号：US11484775
申请日：2006-07-12
IPC分类号： H03B1/00
摘要： While a charge pump activation/deactivation control circuit is outputting a high level signal, MOS transistors for short-circuiting a flying capacitor are off, and the charge pump circuit operates normally. When the charge pump activation/deactivation control circuit outputs a low level signal, the MOS transistors for short-circuiting the flying capacitor are turned on, and the charge pump circuit is deactivated. Consequently, the voltages at the terminals of the flying capacitor are the same and the charge charged therein is discharged. Therefore, when the charge pump circuit is activated again, the initial amount of charge charged to the flying capacitor is zero. Consequently, no large current flows through an output capacitor in the first discharging cycle after the re-activation.
摘要翻译： 当电荷泵激活/去激活控制电路输出高电平信号时，用于使飞溅电容器短路的MOS晶体管关闭，并且电荷泵电路正常工作。 当电荷泵激活/去激活控制电路输出低电平信号时，用于使飞跨电容器短路的MOS晶体管导通，并且电荷泵电路被去激活。 因此，飞跨电容器的端子处的电压相同，并且其中充入的电荷被放电。 因此，当再次激活电荷泵电路时，充电到飞行电容器的初始充电量为零。 因此，在重新激活之后，在第一放电周期中没有大电流流过输出电容器。
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公开(公告)号：US20070013448A1
公开(公告)日：2007-01-18
申请号：US11484775
申请日：2006-07-12
IPC分类号： H03L7/00
摘要： While a charge pump activation/deactivation control circuit is outputting a high level signal, MOS transistors for short-circuiting a flying capacitor are off, and the charge pump circuit operates normally. When the charge pump activation/deactivation control circuit outputs a low level signal, the MOS transistors for short-circuiting the flying capacitor are turned on, and the charge pump circuit is deactivated. Consequently, the voltages at the terminals of the flying capacitor are the same and the charge charged therein is discharged. Therefore, when the charge pump circuit is activated again, the initial amount of charge charged to the flying capacitor is zero. Consequently, no large current flows through an output capacitor in the first discharging cycle after the re-activation.
摘要翻译： 当电荷泵激活/去激活控制电路输出高电平信号时，用于使飞溅电容器短路的MOS晶体管关闭，并且电荷泵电路正常工作。 当电荷泵激活/去激活控制电路输出低电平信号时，用于使飞跨电容器短路的MOS晶体管导通，并且电荷泵电路被去激活。 因此，飞跨电容器的端子处的电压相同，并且其中充入的电荷被放电。 因此，当再次激活电荷泵电路时，充电到飞行电容器的初始充电量为零。 因此，在重新激活之后，在第一放电周期中没有大电流流过输出电容器。
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3.发明申请公开(公告)号：US20060050456A1
公开(公告)日：2006-03-09
申请号：US11220062
申请日：2005-09-06
IPC分类号： H02H9/00
摘要： A semiconductor integrated circuit includes: a charge pumping circuit for generating a negative power supply voltage; an input portion for biasing an average value of an input signal at 0V; and a video signal output portion that operates with a positive/negative power supply utilizing the charge pumping circuit as a negative power supply to amplify the zero-biased signal, outputting signals of positive/negative polarity. A diode clamp circuit is connected to the input portion, and a maximum level of a voltage of the input signal on the negative side is clamped to a clamp voltage produced by the diode clamp circuit when the maximum level of the voltage of the input signal on the negative side is lower than the clamp voltage, thereby suppressing shrinkage of the output signal on the negative side. SYNC shrinkage in the video signal output portion during high luminance signal input is suppressed.
摘要翻译： 半导体集成电路包括：用于产生负电源电压的电荷泵浦电路; 用于将输入信号的平均值偏置在0V的输入部分; 以及视频信号输出部，其利用利用电荷泵浦电路的正/负电源作为负电源来放大零偏置信号，输出正/负极性的信号。 二极管钳位电路连接到输入部分，负极侧的输入信号的电压的最大电平被钳位到由二极管钳位电路产生的钳位电压，当输入信号的电压的最大电平为 负侧低于钳位电压，从而抑制负侧的输出信号的收缩。 在高亮度信号输入期间视频信号输出部分的SYNC收缩被抑制。
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4.发明申请VIDEO SIGNAL OUTPUT CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING THE SAME 审中-公开视频信号输出电路和半导体集成电路，包括它们公开(公告)号：US20090128706A1
公开(公告)日：2009-05-21
申请号：US12096533
申请日：2007-12-05
CPC分类号： H04N5/63
摘要： A video output circuit that is operated at a low power supply voltage and capable of achieving reduced power consumption with a simple circuit configuration and a semiconductor integrated circuit incorporating the same are provided. The video signal output circuit includes a video signal input terminal 1, a clamp circuit 3 that is connected to the video signal input terminal 1, a voltage-current conversion circuit 4 that is connected to the clamp circuit 3, a current amplifier circuit 5 that is connected to the voltage-current conversion circuit 4 and a video signal output terminal 6 that is connected to the current amplifier circuit 5, wherein a resistor 8 is connected between the video signal output terminal 6 and a ground, a transmission line 9 is connected with the video signal output terminal 6, and a load resistor 10 having an equal resistance to the resistor 8 is connected between another end of the transmission line 9 and a ground. The clamp circuit 3 fixes a negative signal voltage.
摘要翻译： 提供了以低电源电压操作并且能够以简单的电路配置实现降低的功耗并且包括其的半导体集成电路的视频输出电路。 视频信号输出电路包括视频信号输入端1，连接到视频信号输入端1的钳位电路3，连接到钳位电路3的电压电流转换电路4，电流放大电路5， 连接到电压电流转换电路4和连接到电流放大器电路5的视频信号输出端子6，其中电阻器8连接在视频信号输出端子6和地之间，传输线9被连接 与视频信号输出端子6连接，并且具有与电阻器8相等的电阻的负载电阻器10连接在传输线9的另一端和地之间。 钳位电路3固定负信号电压。
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公开(公告)号：US20070024347A1
公开(公告)日：2007-02-01
申请号：US11488503
申请日：2006-07-18
IPC分类号： G05F1/10
摘要： A semiconductor integrated circuit includes a charge pump circuit for stepping down or stepping up a voltage supplied from a single voltage supply VDD and outputting the voltage, by repeating an operation of charging a flying capacitor C1 and transferring charges stored in the flying capacitor to a storage capacitor C2. During the operation of the charge pump circuit, current supply for charging the flying capacitor is carried out by a current mirror operation. The semiconductor integrated circuit thus obtained by including the charge pump circuit is characterized in that rush current on startup of charge pumping is reduced and that output performance of a DC-CD converter is not impaired.
摘要翻译： 半导体集成电路包括电荷泵电路，用于通过重复对飞跨电容器C1进行充电的操作并将存储在飞行电容器中的电荷转移到一个电压源中，从而降低或升高从单个电压源VDD提供的电压并输出该电压 存储电容器C 2。 在充电泵电路的操作期间，通过电流反射镜操作来执行用于对飞跨电容器充电的电流源。 由此获得的包含电荷泵电路的半导体集成电路的特征在于，电荷泵浦启动时的冲击电流降低，DC-CD转换器的输出性能不受损害。
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公开(公告)号：US20100039163A1
公开(公告)日：2010-02-18
申请号：US12539251
申请日：2009-08-11
CPC分类号： H01L27/0921 , H03K17/0822
摘要： To provide a semiconductor integrated circuit including: a detection circuit that detects an occurrence of latch up and can be configured while adopting a layout configuration that suppresses the occurrence of latch up; and a recovery unit that enables a recovery from the latch up without cutting off a positive potential. The semiconductor integrated circuit includes: a n-channel MOS transistor 7 that is formed on a P-type region 3 on a semiconductor substrate; and a latch up detection circuit that detects an occurrence of latch up in the n-channel MOS transistor 7. The latch up detection circuit includes: a n-MOS transistor structure 12 in which a source 10 and a back gate 8 are connected in common with a source 5 and the back gate 8 of the n-channel MOS transistor 7; and an electric current detection unit 15 that detects an electric current flowing to a drain 9 of the n-MOS transistor structure 12.
摘要翻译： 提供一种半导体集成电路，包括：检测电路，其检测闩锁的发生，并且可以在采用抑制闭锁发生的布局配置的同时进行配置; 以及恢复单元，其能够从闩锁恢复而不切断正电位。 半导体集成电路包括：形成在半导体基板上的P型区域3上的n沟道MOS晶体管7; 以及锁存检测电路，其检测n沟道MOS晶体管7中的锁存的发生。锁存检测电路包括：n-MOS晶体管结构12，其中源极10和背栅极8共同连接 源极5和n沟道MOS晶体管7的背栅极8; 以及电流检测单元15，其检测流向n-MOS晶体管结构12的漏极9的电流。
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公开(公告)号：US20050161810A1
公开(公告)日：2005-07-28
申请号：US10512829
申请日：2004-01-26
IPC分类号： H01L23/528 , H01L23/48
CPC分类号： H01L23/5286 , H01L24/48 , H01L24/49 , H01L2224/05554 , H01L2224/48227 , H01L2224/49113 , H01L2924/00014 , H01L2924/3011 , H01L2224/45099 , H01L2224/05599
摘要： In a semiconductor device such as a chip having both of an analog circuit and a digital circuit, each of a first power supply wiring (20) for supplying power to an I/O circuit (digital circuit) positioned in the semiconductor device and a third power supply wiring (30) for supplying power to an internal circuit (300) such as an analog circuit formed as a cell, which is a power supply wiring connected to the power supply wiring (20) and positioned in the semiconductor chip (200), is formed from a structure of a multilayer wiring. This lowers the synthesized impedance of these power supply wirings (20, 30) and reduces the influence of power supply noise resulting from the operation of the digital circuit on the analog circuit within the semiconductor chip.
摘要翻译： 在诸如具有模拟电路和数字电路两者的芯片的半导体器件中，用于向位于半导体器件中的I / O电路（数字电路）供电的第一电源布线（20）和第三 用于向诸如形成为单元的模拟电路等内部电路（300）供电的电源布线（30），其为连接到电源布线（20）并位于半导体芯片（200）中的电源布线， 由多层布线的结构形成。 这降低了这些电源配线（20,30）的合成阻抗，并且降低了由数字电路的操作引起的电源噪声对半导体芯片内的模拟电路的影响。
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公开(公告)号：US08116050B2
公开(公告)日：2012-02-14
申请号：US12539251
申请日：2009-08-11
IPC分类号： H02H9/00
CPC分类号： H01L27/0921 , H03K17/0822
摘要： To provide a semiconductor integrated circuit including: a detection circuit that detects an occurrence of latch up and can be configured while adopting a layout configuration that suppresses the occurrence of latch up; and a recovery unit that enables a recovery from the latch up without cutting off a positive potential. The semiconductor integrated circuit includes: a n-channel MOS transistor 7 that is formed on a P-type region 3 on a semiconductor substrate; and a latch up detection circuit that detects an occurrence of latch up in the n-channel MOS transistor 7. The latch up detection circuit includes: a n-MOS transistor structure 12 in which a source 10 and a back gate 8 are connected in common with a source 5 and the back gate 8 of the n-channel MOS transistor 7; and an electric current detection unit 15 that detects an electric current flowing to a drain 9 of the n-MOS transistor structure 12.
摘要翻译： 提供一种半导体集成电路，包括：检测电路，其检测闩锁的发生，并且可以在采用抑制闭锁发生的布局配置的同时进行配置; 以及恢复单元，其能够从闩锁恢复而不切断正电位。 半导体集成电路包括：形成在半导体基板上的P型区域3上的n沟道MOS晶体管7; 以及锁存检测电路，其检测n沟道MOS晶体管7中的锁存的发生。锁存检测电路包括：n-MOS晶体管结构12，其中源极10和背栅极8共同连接 源极5和n沟道MOS晶体管7的背栅极8; 以及电流检测单元15，其检测流向n-MOS晶体管结构12的漏极9的电流。
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公开(公告)号：US07605638B2
公开(公告)日：2009-10-20
申请号：US11773066
申请日：2007-07-03
摘要： A semiconductor integrated circuit that suppresses steep changes of an output voltage when starting of a charge pump circuit to suppress transient displacement of output of a circuit block operating independently of the charge pump circuit is provided.A semiconductor integrated circuit has: a charge pump circuit which charges a first capacitor with an input voltage, transfers a charge accumulated in the first capacitor to a second capacitor, outputs, as an output voltage, a voltage of the second capacitor, and is capable of changing over a capability of charging the second capacitor; a first circuit block that receives a positive voltage and a grounding potential; and a second circuit block that receives the positive voltage and the output voltage of the charge pump. The semiconductor integrated circuit suppresses the charging capability by the charge pump circuit when starting of the charge pump circuit.
摘要翻译： 提供一种半导体集成电路，其抑制在启动电荷泵电路时抑制输出电压的急剧变化，以抑制独立于电荷泵电路工作的电路块的输出的瞬态位移。 一种半导体集成电路具有：对具有输入电压的第一电容器充电的电荷泵电路，将在第一电容器中累积的电荷传递给第二电容器，输出第二电容器的电压作为输出电压，并且能够 改变对第二电容器充电的能力; 接收正电压和接地电位的第一电路块; 以及接收电荷泵的正电压和输出电压的第二电路块。 半导体集成电路在启动电荷泵电路时抑制充电泵电路的充电能力。
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10.发明申请Charge pump circuit and semiconductor integrated circuit incorporating the same 审中-公开电荷泵电路和包含其的半导体集成电路公开(公告)号：US20070024346A1
公开(公告)日：2007-02-01
申请号：US11488480
申请日：2006-07-18
IPC分类号： G05F1/10
CPC分类号： H02M3/07
摘要： A charge pump circuit includes terminals that are connectable with a flying capacitor and a charge capacitor, respectively, and driving transistors connected with the terminals, a power supply voltage, and a ground potential, for controlling the charging of the flying capacitor and the transfer of charges from the flying capacitor to the charge capacitor. By repeating alternately an operation of charging the flying capacitor and an operation of transferring charges stored in the flying capacitor to the charge capacitor according to control signals supplied to gates of the transistors, the power source voltage is stepped down or stepped up. At least one of the driving transistors has its gate to be connected to a driving buffer via an impedance element so that the control signal is supplied thereto via the driving buffer. A switching element is connected between the impedance element and the gate of the driving transistor so that when the driving transistor is turned off, the gate is switched to low impedance by the switching element.
摘要翻译： 电荷泵电路包括分别与飞电容器和充电电容器连接的端子和与端子连接的驱动晶体管，电源电压和接地电位，用于控制飞行电容器的充电和转移 从飞溅电容器充电到充电电容器。 通过根据提供给晶体管的栅极的控制信号交替地重复对飞跨电容器进行充电的操作和将存储在飞行电容器中的电荷转移到充电电容器的操作，电源电压被降低或升高。 至少一个驱动晶体管的栅极通过阻抗元件连接到驱动缓冲器，使得经由驱动缓冲器向其提供控制信号。 开关元件连接在阻抗元件和驱动晶体管的栅极之间，使得当驱动晶体管截止时，栅极被开关元件切换到低阻抗。
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