公开(公告)号：US06774694B1

公开(公告)日：2004-08-10

申请号：US10328637

申请日：2002-12-24

申请人： Kenneth J. Stern ,  Jeff W. Barrell ,  Paul S. Cheung ,  Thomas Alan Gaiser

发明人： Kenneth J. Stern ,  Jeff W. Barrell ,  Paul S. Cheung ,  Thomas Alan Gaiser

IPC分类号： H03H1126

CPC分类号： H03L7/0812 ,  H03K5/133 ,  H03K5/1508 ,  H03L7/07

摘要： A timing vernier applies a pair of stable bias voltages to intermediate points of an impedance string to establish reliable and calibratable delay cell biases for a fine multiplexer. A coarse input multiplexer is switched to a new timing signal substantially immediately after passing a prior valid timing signal to maximize the time prior to each valid output that the waveform is independent of the prior delay pattern. Logic circuitry is provided for three different phase differential regimes between successive timing signals to ensure that invalid output signals separated by less than a clock period are not produced. Mask commands are inserted into a series of timing control commands to equalize the average rates of writing and reading out the timing control commands with the mask commands skipped at readout.

摘要翻译： 定时游标器将一对稳定的偏置电压施加到阻抗串的中间点，以为精细多路复用器建立可靠和可校准的延迟单元偏移。 粗略输入多路复用器在通过先前的有效定时信号之后基本上立即被切换到新的定时信号，以使每个有效输出之前的时间最大化波形独立于先前的延迟模式。 为连续定时信号之间的三个不同的相位差方案提供逻辑电路，以确保不产生分开不到时钟周期的无效输出信号。 掩码命令被插入到一系列定时控制命令中，以平均写入速率和读出定时控制命令，并在读出时跳过掩码命令。