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    Nitride based transistors on semi-insulating silicon carbide substrates
    5.
    发明授权
    Nitride based transistors on semi-insulating silicon carbide substrates 有权
    半绝缘碳化硅衬底上的基于氮化物的晶体管

    公开(公告)号：US06486502B1

    公开(公告)日：2002-11-26

    申请号：US09701951

    申请日：2001-02-16

    申请人： Scott Thomas Sheppard ,  Scott Thomas Allen ,  John Williams Palmour

    发明人： Scott Thomas Sheppard ,  Scott Thomas Allen ,  John Williams Palmour

    IPC分类号： H01L2976

    CPC分类号： H01L29/1608 ,  H01L29/2003 ,  H01L29/267 ,  H01L29/452 ,  H01L29/7783 ,  H01L29/7787

    摘要： A high electron mobility transistor (HEMT) (10) is disclosed that includes a semi-insulating silicon carbide substrate (11), an aluminum nitride buffer layer (12) on the substrate, an insulating gallium nitride layer (13) on the buffer layer, an active structure of aluminum gallium nitride (14) on the gallium nitride layer, a passivation layer (23) on the aluminum gallium nitride active structure, and respective source, drain and gate contacts (21, 22, 23) to the aluminum gallium nitride active structure.

    摘要翻译： 公开了一种高电子迁移率晶体管（HEMT）（10），其包括半绝缘碳化硅衬底（11），衬底上的氮化铝缓冲层（12），缓冲层上的绝缘氮化镓层（13） ，在氮化镓层上的氮化镓铝（14）的活性结构，氮化镓铝活性结构上的钝化层（23）以及与铝镓的相应的源极，漏极和栅极接触（21,22,23） 氮化物活性结构。

    Method of forming vias in silicon carbide and resulting devices and circuits
    6.
    发明授权
    Method of forming vias in silicon carbide and resulting devices and circuits 有权
    在碳化硅和所产生的器件和电路中形成通孔的方法

    公开(公告)号：US08202796B2

    公开(公告)日：2012-06-19

    申请号：US13021833

    申请日：2011-02-07

    申请人： Zoltan Ring ,  Scott Thomas Sheppard ,  Helmut Hagleitner

    发明人： Zoltan Ring ,  Scott Thomas Sheppard ,  Helmut Hagleitner

    IPC分类号： H01L21/28

    CPC分类号： H01L29/452 ,  H01L21/30604 ,  H01L21/3081 ,  H01L21/445 ,  H01L21/76898 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/7787 ,  H01L29/812

    摘要： A method of fabricating an integrated circuit on a silicon carbide substrate is disclosed that eliminates wire bonding. The method includes fabricating a semiconductor device in epitaxial layers on a surface of a silicon carbide substrate and with at least one metal contact for the device on the uppermost surface of the epitaxial layer. The opposite surface of the substrate is then ground and polished until it is substantially transparent. The polished surface of the silicon carbide substrate is then masked to define a predetermined location for at least one via that is opposite the device metal contact and etching the desired via in steps. The first etching step etches through the silicon carbide substrate at the desired masked location until the etch reaches the epitaxial layer. The second etching step etches through the epitaxial layer to the device contacts. Finally, the via is metallized.

    摘要翻译： 公开了一种在碳化硅衬底上制造集成电路的方法，其消除引线接合。 该方法包括在硅碳化物衬底的表面上制造外延层中的半导体器件，并且在外延层的最上表面上具有用于器件的至少一个金属接触。 然后将基板的相对表面研磨抛光直到基本透明。 然后对碳化硅衬底的抛光表面进行掩模，以限定与设备金属接触相对的至少一个通孔的预定位置，并在步骤中蚀刻所需的通孔。 第一蚀刻步骤在期望的掩蔽位置上蚀刻通过碳化硅衬底，直到蚀刻到达外延层。 第二蚀刻步骤通过外延层蚀刻到器件触点。 最后，通孔被金属化。

    Method of forming vias in silicon carbide and resulting devices and circuits
    7.
    发明授权
    Method of forming vias in silicon carbide and resulting devices and circuits 有权
    在碳化硅和所产生的器件和电路中形成通孔的方法

    公开(公告)号：US07892974B2

    公开(公告)日：2011-02-22

    申请号：US11551286

    申请日：2006-10-20

    申请人： Zoltan Ring ,  Scott Thomas Sheppard ,  Helmut Hagleitner

    发明人： Zoltan Ring ,  Scott Thomas Sheppard ,  Helmut Hagleitner

    IPC分类号： H01L21/44

    CPC分类号： H01L29/452 ,  H01L21/30604 ,  H01L21/3081 ,  H01L21/445 ,  H01L21/76898 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/7787 ,  H01L29/812

    摘要： A method of fabricating an integrated circuit on a silicon carbide substrate is disclosed that eliminates wire bonding that can otherwise cause undesired inductance. The method includes fabricating a semiconductor device in epitaxial layers on a surface of a silicon carbide substrate and with at least one metal contact for the device on the uppermost surface of the epitaxial layer. The opposite surface of the substrate is then ground and polished until it is substantially transparent. The method then includes masking the polished surface of the silicon carbide substrate to define a predetermined location for at least one via that is opposite the device metal contact on the uppermost surface of the epitaxial layer and etching the desired via in steps. The first etching step etches through the silicon carbide substrate at the desired masked location until the etch reaches the epitaxial layer. The second etching step etches through the epitaxial layer to the device contacts. Finally, metallizing the via provides an electrical path from the first surface of the substrate to the metal contact and to the device on the second surface of the substrate.

    摘要翻译： 公开了一种在碳化硅衬底上制造集成电路的方法，其消除了否则会导致不期望的电感的引线接合。 该方法包括在硅碳化物衬底的表面上制造外延层中的半导体器件，并且在外延层的最上表面上具有用于器件的至少一个金属接触。 然后将基板的相对表面研磨抛光直到基本透明。 该方法然后包括掩盖碳化硅衬底的抛光表面，以限定用于至少一个通孔的预定位置，其与外延层的最上表面上的器件金属接触相对，并在步骤中蚀刻所需的通孔。 第一蚀刻步骤在期望的掩蔽位置上蚀刻通过碳化硅衬底，直到蚀刻到达外延层。 第二蚀刻步骤通过外延层蚀刻到器件触点。 最后，通孔的金属化提供了从衬底的第一表面到金属接触件和衬底的第二表面上的器件的电路径。

    Method of Forming Vias in Silicon Carbide and Resulting Devices and Circuits
    9.
    发明申请
    Method of Forming Vias in Silicon Carbide and Resulting Devices and Circuits 有权
    在碳化硅和所得装置和电路中形成通孔的方法

    公开(公告)号：US20090104738A1

    公开(公告)日：2009-04-23

    申请号：US11551286

    申请日：2006-10-20

    申请人： Zoltan Ring ,  Scott Thomas Sheppard ,  Helmut Hagleitner

    发明人： Zoltan Ring ,  Scott Thomas Sheppard ,  Helmut Hagleitner

    IPC分类号： H01L21/335 ,  H01L21/768

    CPC分类号： H01L29/452 ,  H01L21/30604 ,  H01L21/3081 ,  H01L21/445 ,  H01L21/76898 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/7787 ,  H01L29/812

    摘要： A method of fabricating an integrated circuit on a silicon carbide substrate is disclosed that eliminates wire bonding that can otherwise cause undesired inductance. The method includes fabricating a semiconductor device in epitaxial layers on a surface of a silicon carbide substrate and with at least one metal contact for the device on the uppermost surface of the epitaxial layer. The opposite surface of the substrate is then ground and polished until it is substantially transparent. The method then includes masking the polished surface of the silicon carbide substrate to define a predetermined location for at least one via that is opposite the device metal contact on the uppermost surface of the epitaxial layer and etching the desired via in steps. The first etching step etches through the silicon carbide substrate at the desired masked location until the etch reaches the epitaxial layer. The second etching step etches through the epitaxial layer to the device contacts. Finally, metallizing the via provides an electrical path from the first surface of the substrate to the metal contact and to the device on the second surface of the substrate.

    摘要翻译： 公开了一种在碳化硅衬底上制造集成电路的方法，其消除了否则会导致不期望的电感的引线接合。 该方法包括在硅碳化物衬底的表面上制造外延层中的半导体器件，并且在外延层的最上表面上具有用于器件的至少一个金属接触。 然后将基板的相对表面研磨抛光直到基本透明。 该方法然后包括掩盖碳化硅衬底的抛光表面，以限定用于至少一个通孔的预定位置，其与外延层的最上表面上的器件金属接触相对，并在步骤中蚀刻所需的通孔。 第一蚀刻步骤在期望的掩蔽位置上蚀刻通过碳化硅衬底，直到蚀刻到达外延层。 第二蚀刻步骤通过外延层蚀刻到器件触点。 最后，通孔的金属化提供了从衬底的第一表面到金属接触件和衬底的第二表面上的器件的电路径。