公开(公告)号：US20120049277A1

公开(公告)日：2012-03-01

申请号：US12869764

申请日：2010-08-27

Applicant: Hong-Ze Lin ,  Bo-Jui Huang ,  Chin-Lung Chen ,  Ting-Zhou Yan ,  Wei-Shan Liao ,  Han-Min Huang ,  Chun-Yao Lee ,  Kun-Yi Chou

Inventor： Hong-Ze Lin ,  Bo-Jui Huang ,  Chin-Lung Chen ,  Ting-Zhou Yan ,  Wei-Shan Liao ,  Han-Min Huang ,  Chun-Yao Lee ,  Kun-Yi Chou

IPC: H01L29/78

CPC classification number: H01L29/0878 ,  H01L29/0692 ,  H01L29/0847 ,  H01L29/41758 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/7835

Abstract: A lateral-diffusion metal-oxide-semiconductor device includes a semiconductor substrate having at least a field oxide layer, a gate having a layout pattern of a racetrack shape formed on the substrate, a common source formed in the semiconductor substrate and enclosed by the gate, and a drain surrounding the gate and formed in the semiconductor substrate. The gate covers a portion of the field oxide layer. The common source includes a first doped region having a first conductive type and a plurality of islanding second doped regions having a second conductive type. The drain includes a third doped region having the first conductive type. The third doped region overlaps a portion of the field oxide layer and having an overlapping area between the third doped region and the field oxide layer.

Abstract translation: 横向扩散金属氧化物半导体器件包括至少具有场氧化物层的半导体衬底，在衬底上形成有轨迹形状的布局图案的栅极，形成在半导体衬底中并被栅极包围的公共源极 以及围绕栅极并形成在半导体衬底中的漏极。 栅极覆盖场氧化物层的一部分。 公共源包括具有第一导电类型的第一掺杂区域和具有第二导电类型的多个岛状第二掺杂区域。 漏极包括具有第一导电类型的第三掺杂区域。 第三掺杂区域与场氧化物层的一部分重叠，并且在第三掺杂区域和场氧化物层之间具有重叠区域。

公开(公告)号：US20110079849A1

公开(公告)日：2011-04-07

申请号：US12573892

申请日：2009-10-06

Applicant: Ting-Zhou Yan ,  Bo-Jui Huang ,  Chia-Kang Lin ,  Hong-Ze Lin

Inventor： Ting-Zhou Yan ,  Bo-Jui Huang ,  Chia-Kang Lin ,  Hong-Ze Lin

IPC: H01L29/78

CPC classification number: H01L29/0696 ,  H01L29/0619 ,  H01L29/086 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/66689 ,  H01L29/7816

Abstract: A lateral-diffusion metal-oxide-semiconductor device includes a source in a racetrack shaped active area, a first field oxide region isolating and surrounding the racetrack shaped active area, a racetrack shaped gate surrounding the source, and a drain disposed at one side of the gate opposite to the source. The source includes a P+ doping region in a P well and an N+ doping region butting on the P+ doping region.

Abstract translation: 横向扩散金属氧化物半导体器件包括在跑道形活动区域中的源，隔离并围绕跑道形活动区域的第一场氧化物区域，围绕源的跑道形门，以及设置在 门对面的来源。 源包括P阱中的P +掺杂区域和P +掺杂区域上的N +掺杂区域。

公开(公告)号：US20130168767A1

公开(公告)日：2013-07-04

申请号：US13342189

申请日：2012-01-02

Applicant: An-Hung Lin ,  Hong-Ze Lin ,  Bo-Jui Huang ,  Wei-Shan Liao ,  Ting-Zhou Yan ,  Kun-Yi Chou ,  Chun-Wei Chen ,  Ming-Yong Jian

Inventor： An-Hung Lin ,  Hong-Ze Lin ,  Bo-Jui Huang ,  Wei-Shan Liao ,  Ting-Zhou Yan ,  Kun-Yi Chou ,  Chun-Wei Chen ,  Ming-Yong Jian

IPC: H01L27/06 ,  H01L29/78

CPC classification number: H01L27/0727 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/42368 ,  H01L29/782

Abstract: The present invention provides a lateral diffused metal-oxide-semiconductor device including a first doped region, a second doped region, a third doped region, a gate structure, and a contact metal. The first doped region and the third doped region have a first conductive type, and the second doped region has a second conductive type. The second doped region, which has a racetrack-shaped layout, is disposed in the first doped region, and has a long axis. The third doped region is disposed in the second doped region. The gate structure is disposed on the first doped region and the second doped region at a side of the third doped region. The contact metal is disposed on the first doped region at a side of the second doped region extending out along the long axis, and is in contact with the first doped region.

Abstract translation: 本发明提供了包括第一掺杂区，第二掺杂区，第三掺杂区，栅极结构和接触金属的横向扩散金属氧化物半导体器件。 第一掺杂区域和第三掺杂区域具有第一导电类型，并且第二掺杂区域具有第二导电类型。 具有跑道形状布局的第二掺杂区域设置在第一掺杂区域中并且具有长轴。 第三掺杂区域设置在第二掺杂区域中。 栅极结构设置在第一掺杂区域和第二掺杂区域的第三掺杂区域的一侧。 接触金属设置在沿着长轴延伸出的第二掺杂区域的一侧上的第一掺杂区域上，并与第一掺杂区域接触。

公开(公告)号：US20130126968A1

公开(公告)日：2013-05-23

申请号：US13299446

申请日：2011-11-18

Applicant: An-Hung LIN ,  Hong-Ze Lin ,  Bo-Jui Huang ,  Wei-Shan Liao ,  Ting-Zhou Yan ,  Wei-Chun Chang ,  Chun-Yao Lee ,  Kun-Yi Chou

Inventor： An-Hung LIN ,  Hong-Ze Lin ,  Bo-Jui Huang ,  Wei-Shan Liao ,  Ting-Zhou Yan ,  Wei-Chun Chang ,  Chun-Yao Lee ,  Kun-Yi Chou

IPC: H01L29/78

CPC classification number: H01L29/0696 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/7816 ,  H01L29/7835

Abstract: A high voltage semiconductor device is provided. A first-polarity buried layer is formed in the substrate. A first high voltage second-polarity well region is located over the first-polarity buried layer. A second-polarity base region is disposed within the first high voltage second-polarity well region. A source region is disposed within the second-polarity base region. A high voltage deep first-polarity well region is located over the first-polarity buried layer and closely around the first high voltage second-polarity well region. A first-polarity drift region is disposed within the high voltage deep first-polarity well region. A gate structure is disposed over the substrate. A second high voltage second-polarity well region is located over the first-polarity buried layer and closely around the high voltage deep first-polarity well region. A deep first-polarity well region is located over the first-polarity buried layer and closely around the second high voltage second-polarity well region.

Abstract translation: 提供高压半导体器件。 在衬底中形成第一极性掩埋层。 第一高电压第二极性阱区位于第一极性掩埋层的上方。 第二极性基极区域设置在第一高电压第二极性阱区域内。 源极区域设置在第二极性基极区域内。 高电压深的第一极性极区位于第一极性埋层之上，紧邻第一高电压第二极性阱区。 第一极性漂移区域设置在高电压深第一极性阱区域内。 栅极结构设置在衬底上。 第二高电压第二极性阱区域位于第一极性掩埋层上方并且紧邻高电压深第一极性阱区域。 深第一极性阱区域位于第一极性掩埋层上并且紧邻第二高电压第二极性阱区域。

公开(公告)号：US08587058B2

公开(公告)日：2013-11-19

申请号：US13342189

申请日：2012-01-02

Applicant: An-Hung Lin ,  Hong-Ze Lin ,  Bo-Jui Huang ,  Wei-Shan Liao ,  Ting-Zhou Yan ,  Kun-Yi Chou ,  Chun-Wei Chen ,  Ming-Yong Jian

Inventor： An-Hung Lin ,  Hong-Ze Lin ,  Bo-Jui Huang ,  Wei-Shan Liao ,  Ting-Zhou Yan ,  Kun-Yi Chou ,  Chun-Wei Chen ,  Ming-Yong Jian

IPC: H01L29/66

CPC classification number: H01L27/0727 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/42368 ,  H01L29/782

Abstract: The present invention provides a lateral diffused metal-oxide-semiconductor device including a first doped region, a second doped region, a third doped region, a gate structure, and a contact metal. The first doped region and the third doped region have a first conductive type, and the second doped region has a second conductive type. The second doped region, which has a racetrack-shaped layout, is disposed in the first doped region, and has a long axis. The third doped region is disposed in the second doped region. The gate structure is disposed on the first doped region and the second doped region at a side of the third doped region. The contact metal is disposed on the first doped region at a side of the second doped region extending out along the long axis, and is in contact with the first doped region.

Abstract translation: 本发明提供了包括第一掺杂区，第二掺杂区，第三掺杂区，栅极结构和接触金属的横向扩散金属氧化物半导体器件。 第一掺杂区域和第三掺杂区域具有第一导电类型，并且第二掺杂区域具有第二导电类型。 具有跑道形状布局的第二掺杂区域设置在第一掺杂区域中并且具有长轴。 第三掺杂区域设置在第二掺杂区域中。 栅极结构设置在第一掺杂区域和第二掺杂区域的第三掺杂区域的一侧。 接触金属设置在沿着长轴延伸出的第二掺杂区域的一侧上的第一掺杂区域上，并与第一掺杂区域接触。

公开(公告)号：US08482063B2

公开(公告)日：2013-07-09

申请号：US13299446

申请日：2011-11-18

Applicant: An-Hung Lin ,  Hong-Ze Lin ,  Bo-Jui Huang ,  Wei-Shan Liao ,  Ting-Zhou Yan ,  Wei-Chun Chang ,  Chun-Yao Lee ,  Kun-Yi Chou

Inventor： An-Hung Lin ,  Hong-Ze Lin ,  Bo-Jui Huang ,  Wei-Shan Liao ,  Ting-Zhou Yan ,  Wei-Chun Chang ,  Chun-Yao Lee ,  Kun-Yi Chou

IPC: H01L29/66

CPC classification number: H01L29/0696 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/7816 ,  H01L29/7835

Abstract: A high voltage semiconductor device is provided. A first-polarity buried layer is formed in the substrate. A first high voltage second-polarity well region is located over the first-polarity buried layer. A second-polarity base region is disposed within the first high voltage second-polarity well region. A source region is disposed within the second-polarity base region. A high voltage deep first-polarity well region is located over the first-polarity buried layer and closely around the first high voltage second-polarity well region. A first-polarity drift region is disposed within the high voltage deep first-polarity well region. A gate structure is disposed over the substrate. A second high voltage second-polarity well region is located over the first-polarity buried layer and closely around the high voltage deep first-polarity well region. A deep first-polarity well region is located over the first-polarity buried layer and closely around the second high voltage second-polarity well region.

Abstract translation: 提供高压半导体器件。 在衬底中形成第一极性掩埋层。 第一高电压第二极性阱区位于第一极性掩埋层的上方。 第二极性基极区域设置在第一高电压第二极性阱区域内。 源极区域设置在第二极性基极区域内。 高电压深的第一极性极区位于第一极性埋层之上，紧邻第一高电压第二极性阱区。 第一极性漂移区域设置在高电压深第一极性阱区域内。 栅极结构设置在衬底上。 第二高电压第二极性阱区域位于第一极性掩埋层上方并且紧邻高电压深第一极性阱区域。 深第一极性阱区域位于第一极性掩埋层上并且紧邻第二高电压第二极性阱区域。

公开(公告)号：US20120286359A1

公开(公告)日：2012-11-15

申请号：US13105912

申请日：2011-05-12

Applicant: An-Hung Lin ,  Hong-Ze Lin ,  Bo-Jui Huang ,  Wei-Shan Liao ,  Ting-Zhou Yan ,  Kun-Yi Chou ,  Chun-Wei Chen

Inventor： An-Hung Lin ,  Hong-Ze Lin ,  Bo-Jui Huang ,  Wei-Shan Liao ,  Ting-Zhou Yan ,  Kun-Yi Chou ,  Chun-Wei Chen

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L29/7816 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/66689 ,  H01L29/7824 ,  H01L29/7835

Abstract: A lateral-diffused metal oxide semiconductor device (LDMOS) includes a substrate, a first deep well, at least a field oxide layer, a gate, a second deep well, a first dopant region, a drain and a common source. The substrate has the first deep well which is of a first conductive type. The gate is disposed on the substrate and covers a portion of the field oxide layer. The second deep well having a second conductive type is disposed in the substrate and next to the first deep well. The first dopant region having a second conductive type is disposed in the second deep well. The doping concentration of the first dopant region is higher than the doping concentration of the second deep well.

Abstract translation: 横向扩散的金属氧化物半导体器件（LDMOS）包括衬底，第一深阱，至少场氧化物层，栅极，第二深阱，第一掺杂区，漏极和公共源。 衬底具有第一导电类型的第一深阱。 栅极设置在衬底上并覆盖场氧化物层的一部分。 具有第二导电类型的第二深阱设置在衬底中并且紧邻第一深孔。 具有第二导电类型的第一掺杂区域设置在第二深阱中。 第一掺杂剂区域的掺杂浓度高于第二深阱的掺杂浓度。

公开(公告)号：US08581338B2

公开(公告)日：2013-11-12

申请号：US13105912

申请日：2011-05-12

Applicant: An-Hung Lin ,  Hong-Ze Lin ,  Bo-Jui Huang ,  Wei-Shan Liao ,  Ting-Zhou Yan ,  Kun-Yi Chou ,  Chun-Wei Chen

Inventor： An-Hung Lin ,  Hong-Ze Lin ,  Bo-Jui Huang ,  Wei-Shan Liao ,  Ting-Zhou Yan ,  Kun-Yi Chou ,  Chun-Wei Chen

IPC: H01L29/78

CPC classification number: H01L29/7816 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/66689 ,  H01L29/7824 ,  H01L29/7835

Abstract: A lateral-diffused metal oxide semiconductor device (LDMOS) includes a substrate, a first deep well, at least a field oxide layer, a gate, a second deep well, a first dopant region, a drain and a common source. The substrate has the first deep well which is of a first conductive type. The gate is disposed on the substrate and covers a portion of the field oxide layer. The second deep well having a second conductive type is disposed in the substrate and next to the first deep well. The first dopant region having a second conductive type is disposed in the second deep well. The doping concentration of the first dopant region is higher than the doping concentration of the second deep well.

Abstract translation: 横向扩散的金属氧化物半导体器件（LDMOS）包括衬底，第一深阱，至少场氧化物层，栅极，第二深阱，第一掺杂区，漏极和公共源。 衬底具有第一导电类型的第一深阱。 栅极设置在衬底上并覆盖场氧化物层的一部分。 具有第二导电类型的第二深阱设置在衬底中并且紧邻第一深孔。 具有第二导电类型的第一掺杂区域设置在第二深阱中。 第一掺杂剂区域的掺杂浓度高于第二深阱的掺杂浓度。

公开(公告)号：US08450801B2

公开(公告)日：2013-05-28

申请号：US12869764

申请日：2010-08-27

Applicant: Hong-Ze Lin ,  Bo-Jui Huang ,  Chin-Lung Chen ,  Ting-Zhou Yan ,  Wei-Shan Liao ,  Han-Min Huang ,  Chun-Yao Lee ,  Kun-Yi Chou

Inventor： Hong-Ze Lin ,  Bo-Jui Huang ,  Chin-Lung Chen ,  Ting-Zhou Yan ,  Wei-Shan Liao ,  Han-Min Huang ,  Chun-Yao Lee ,  Kun-Yi Chou

IPC: H01L23/62

CPC classification number: H01L29/0878 ,  H01L29/0692 ,  H01L29/0847 ,  H01L29/41758 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/7835

Abstract: A lateral-diffusion metal-oxide-semiconductor device includes a semiconductor substrate having at least a field oxide layer, a gate having a layout pattern of a racetrack shape formed on the substrate, a common source formed in the semiconductor substrate and enclosed by the gate, and a drain surrounding the gate and formed in the semiconductor substrate. The gate covers a portion of the field oxide layer. The common source includes a first doped region having a first conductive type and a plurality of islanding second doped regions having a second conductive type. The drain includes a third doped region having the first conductive type. The third doped region overlaps a portion of the field oxide layer and having an overlapping area between the third doped region and the field oxide layer.

Abstract translation: 横向扩散金属氧化物半导体器件包括至少具有场氧化物层的半导体衬底，在衬底上形成有轨迹形状的布局图案的栅极，形成在半导体衬底中并被栅极包围的公共源极 以及围绕栅极并形成在半导体衬底中的漏极。 栅极覆盖场氧化物层的一部分。 公共源包括具有第一导电类型的第一掺杂区域和具有第二导电类型的多个岛状第二掺杂区域。 漏极包括具有第一导电类型的第三掺杂区域。 第三掺杂区域与场氧化物层的一部分重叠，并且在第三掺杂区域和场氧化物层之间具有重叠区域。