公开(公告)号：US06425086B1

公开(公告)日：2002-07-23

申请号：US09302560

申请日：1999-04-30

申请人： Lawrence T. Clark ,  Bart McDaniel ,  Jay Heeb ,  Tom J. Adelmeyer

发明人： Lawrence T. Clark ,  Bart McDaniel ,  Jay Heeb ,  Tom J. Adelmeyer

IPC分类号： G06F132

CPC分类号： G06F1/324 ,  G06F1/3203 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

摘要： Briefly, in accordance with one embodiment of the invention, a system includes: a processor, a voltage regulator, and a memory. The voltage regulator is coupled to the processor to adjust the operating voltage of the processor. The memory is coupled to the processor by a memory bus. The memory has stored on it processor instructions that, when executed by the processor, result in modification of the operating frequency of the processor and result in adjustment of the operating voltage of the processor, based, at least in part, on dynamic changes in the processing load of the processor.

摘要翻译： 简而言之，根据本发明的一个实施例，系统包括：处理器，电压调节器和存储器。 电压调节器耦合到处理器以调整处理器的工作电压。 存储器通过存储器总线耦合到处理器。 存储器已经存储有处理器指令，当处理器执行时，该指令导致处理器的工作频率的修改并且导致处理器的工作电压的调整，至少部分地基于处理器的动态变化 处理器的处理负载。

公开(公告)号：US06519707B2

公开(公告)日：2003-02-11

申请号：US09951109

申请日：2001-09-10

申请人： Lawrence T. Clark ,  Bart McDaniel ,  Jay Heeb ,  Tom J. Adelmeyer

发明人： Lawrence T. Clark ,  Bart McDaniel ,  Jay Heeb ,  Tom J. Adelmeyer

IPC分类号： G06F132

CPC分类号： G06F1/324 ,  G06F1/3203 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

摘要： Briefly, in accordance with one embodiment of the invention, a system includes: a processor, a voltage regulator, and a memory. The voltage regulator is coupled to the processor to adjust the operating voltage of the processor. The memory is coupled to the processor by a memory bus. The memory has stored on it processor instructions that, when executed by the processor, result in modification of the operating frequency of the processor and result in adjustment of the operating voltage of the processor, based, at least in part, on dynamic changes in the processing load of the processor.