PLASMA ETCH METHOD TO REDUCE MICRO-LOADING
    1.
    发明申请
    PLASMA ETCH METHOD TO REDUCE MICRO-LOADING 有权
    降低微载物的等离子体蚀刻方法

    公开(公告)号:US20110021029A1

    公开(公告)日:2011-01-27

    申请号:US12840034

    申请日:2010-07-20

    IPC分类号: H01L21/465

    CPC分类号: H01L21/76816 H01L21/3065

    摘要: A method of producing plurality of etched features in an electronic device is disclosed that avoids micro-loading problems thus maintaining more uniform sidewall profiles and more uniform critical dimensions. The method comprises performing a first time-divisional plasma etch process step within a plasma chamber to a first depth of the plurality of etched features, and performing a flash process step to remove any polymers from exposed surfaces of the plurality of etched features without requiring an oxidation step. The flash process step is performed independently of the time-divisional plasma etch step. A second time-divisional plasma etch process step is performed within the plasma chamber to a second depth of the plurality of etched features. The method may be repeated until a desired etch depth is reached.

    摘要翻译: 公开了一种在电子设备中产生多个蚀刻特征的方法,其避免微加载问题,从而保持更均匀的侧壁轮廓和更均匀的临界尺寸。 该方法包括在等离子体室内执行第一时分等离子体蚀刻工艺步骤至多个蚀刻特征的第一深度,以及执行闪光处理步骤以从多个蚀刻特征的暴露表面去除任何聚合物,而不需要 氧化步骤。 独立于分时等离子体蚀刻步骤执行闪光处理步骤。 在等离子体室内执行第二分时等离子体蚀刻工艺步骤到多个蚀刻特征的第二深度。 可以重复该方法直到达到期望的蚀刻深度。

    Plasma etch method to reduce micro-loading
    2.
    发明授权
    Plasma etch method to reduce micro-loading 有权
    等离子蚀刻法减少微载荷

    公开(公告)号:US08901004B2

    公开(公告)日:2014-12-02

    申请号:US12840034

    申请日:2010-07-20

    CPC分类号: H01L21/76816 H01L21/3065

    摘要: A method of producing plurality of etched features in an electronic device is disclosed that avoids micro-loading problems thus maintaining more uniform sidewall profiles and more uniform critical dimensions. The method comprises performing a first time-divisional plasma etch process step within a plasma chamber to a first depth of the plurality of etched features, and performing a flash process step to remove any polymers from exposed surfaces of the plurality of etched features without requiring an oxidation step. The flash process step is performed independently of the time-divisional plasma etch step. A second time-divisional plasma etch process step is performed within the plasma chamber to a second depth of the plurality of etched features. The method may be repeated until a desired etch depth is reached.

    摘要翻译: 公开了一种在电子设备中产生多个蚀刻特征的方法,其避免微加载问题,从而保持更均匀的侧壁轮廓和更均匀的临界尺寸。 该方法包括在等离子体室内执行第一时分等离子体蚀刻工艺步骤至多个蚀刻特征的第一深度,以及执行闪光处理步骤以从多个蚀刻特征的暴露表面去除任何聚合物,而不需要 氧化步骤。 独立于分时等离子体蚀刻步骤执行闪光处理步骤。 在等离子体室内执行第二分时等离子体蚀刻工艺步骤到多个蚀刻特征的第二深度。 可以重复该方法直到达到期望的蚀刻深度。