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    PLASMA ETCH METHOD TO REDUCE MICRO-LOADING
    1.
    发明申请
    PLASMA ETCH METHOD TO REDUCE MICRO-LOADING 有权
    降低微载物的等离子体蚀刻方法

    公开(公告)号：US20110021029A1

    公开(公告)日：2011-01-27

    申请号：US12840034

    申请日：2010-07-20

    申请人： Tom Kamp ,  Qian Fu ,  I.C. Jang ,  Linda Braly ,  Shenjian Liu

    发明人： Tom Kamp ,  Qian Fu ,  I.C. Jang ,  Linda Braly ,  Shenjian Liu

    IPC分类号： H01L21/465

    CPC分类号： H01L21/76816 ,  H01L21/3065

    摘要： A method of producing plurality of etched features in an electronic device is disclosed that avoids micro-loading problems thus maintaining more uniform sidewall profiles and more uniform critical dimensions. The method comprises performing a first time-divisional plasma etch process step within a plasma chamber to a first depth of the plurality of etched features, and performing a flash process step to remove any polymers from exposed surfaces of the plurality of etched features without requiring an oxidation step. The flash process step is performed independently of the time-divisional plasma etch step. A second time-divisional plasma etch process step is performed within the plasma chamber to a second depth of the plurality of etched features. The method may be repeated until a desired etch depth is reached.

    摘要翻译： 公开了一种在电子设备中产生多个蚀刻特征的方法，其避免微加载问题，从而保持更均匀的侧壁轮廓和更均匀的临界尺寸。 该方法包括在等离子体室内执行第一时分等离子体蚀刻工艺步骤至多个蚀刻特征的第一深度，以及执行闪光处理步骤以从多个蚀刻特征的暴露表面去除任何聚合物，而不需要 氧化步骤。 独立于分时等离子体蚀刻步骤执行闪光处理步骤。 在等离子体室内执行第二分时等离子体蚀刻工艺步骤到多个蚀刻特征的第二深度。 可以重复该方法直到达到期望的蚀刻深度。

    Plasma etch method to reduce micro-loading
    2.
    发明授权
    Plasma etch method to reduce micro-loading 有权
    等离子蚀刻法减少微载荷

    公开(公告)号：US08901004B2

    公开(公告)日：2014-12-02

    申请号：US12840034

    申请日：2010-07-20

    申请人： Tom Kamp ,  Qian Fu ,  I. C. Jang ,  Linda Braly ,  Shenjian Liu

    发明人： Tom Kamp ,  Qian Fu ,  I. C. Jang ,  Linda Braly ,  Shenjian Liu

    IPC分类号： H01L21/311 ,  C03C15/00 ,  C03C25/68 ,  C23F1/00 ,  H01L21/768 ,  H01L21/3065

    CPC分类号： H01L21/76816 ,  H01L21/3065

    摘要： A method of producing plurality of etched features in an electronic device is disclosed that avoids micro-loading problems thus maintaining more uniform sidewall profiles and more uniform critical dimensions. The method comprises performing a first time-divisional plasma etch process step within a plasma chamber to a first depth of the plurality of etched features, and performing a flash process step to remove any polymers from exposed surfaces of the plurality of etched features without requiring an oxidation step. The flash process step is performed independently of the time-divisional plasma etch step. A second time-divisional plasma etch process step is performed within the plasma chamber to a second depth of the plurality of etched features. The method may be repeated until a desired etch depth is reached.

    摘要翻译： 公开了一种在电子设备中产生多个蚀刻特征的方法，其避免微加载问题，从而保持更均匀的侧壁轮廓和更均匀的临界尺寸。 该方法包括在等离子体室内执行第一时分等离子体蚀刻工艺步骤至多个蚀刻特征的第一深度，以及执行闪光处理步骤以从多个蚀刻特征的暴露表面去除任何聚合物，而不需要 氧化步骤。 独立于分时等离子体蚀刻步骤执行闪光处理步骤。 在等离子体室内执行第二分时等离子体蚀刻工艺步骤到多个蚀刻特征的第二深度。 可以重复该方法直到达到期望的蚀刻深度。

    PULSED BIAS PLASMA PROCESS TO CONTROL MICROLOADING
    3.
    发明申请
    PULSED BIAS PLASMA PROCESS TO CONTROL MICROLOADING 有权
    PULSED BIAS等离子体处理以控制微波

    公开(公告)号：US20110281438A1

    公开(公告)日：2011-11-17

    申请号：US12744588

    申请日：2008-11-18

    申请人： Wonchul Lee ,  Qian Fu ,  Shenjian Liu ,  Bryan Pu

    发明人： Wonchul Lee ,  Qian Fu ,  Shenjian Liu ,  Bryan Pu

    IPC分类号： H01L21/3065 ,  C23F1/08

    CPC分类号： H01L21/32136

    摘要： A method for etching a conductive layer through a mask with wider and narrower features is provided. A steady state etch gas is flowed. A steady state RF power is provided to form a plasma from the etch gas. A pulsed bias voltage is provided during the steady state etch gas flow, wherein the pulsed bias voltage has a frequency between 1 to 10,000 Hz. Wider and narrower features are etched into the conductive layer using the plasma formed from the etch gas.

    摘要翻译： 提供了通过具有更宽和更窄特征的掩模蚀刻导电层的方法。 稳态蚀刻气体流过。 提供稳态RF功率以从蚀刻气体形成等离子体。 在稳态蚀刻气流期间提供脉冲偏压，其中脉冲偏压具有1至10,000Hz之间的频率。 使用由蚀刻气体形成的等离子体将更宽和更窄的特征蚀刻到导电层中。

    Phase change alloy etch
    5.
    发明授权
    Phase change alloy etch 有权
    相变合金蚀刻

    公开(公告)号：US07682979B2

    公开(公告)日：2010-03-23

    申请号：US11479303

    申请日：2006-06-29

    申请人： Qian Fu ,  Shenjian Liu ,  Linda Fung-Ming Lee

    发明人： Qian Fu ,  Shenjian Liu ,  Linda Fung-Ming Lee

    IPC分类号： H01L21/3065

    CPC分类号： H01J37/3244 ,  H01J2237/3341 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1675

    摘要： A method of forming devices is provided. A phase change layer is provided. The phase change layer is etched by providing an etch gas comprising a bromine containing compound and forming a plasma from the etch gas. The phase change layer is of a material that may be heated by a current and then when cooled, either forms an amorphous material or a crystalline material, depending on how fast the material is cooled. In addition, the amorphous material has a resistance at least several times greater than the crystalline material.

    摘要翻译： 提供了一种形成装置的方法。 提供了相变层。 通过提供包含含溴化合物的蚀刻气体并从蚀刻气体形成等离子体来蚀刻相变层。 相变层是可以被电流加热然后冷却的材料，根据材料的冷却速度而形成非晶材料或结晶材料。 此外，无定形材料具有比结晶材料至少几倍的电阻。

    Method of controlling etch microloading for a tungsten-containing layer
    7.
    发明授权
    Method of controlling etch microloading for a tungsten-containing layer 有权
    控制含钨层的蚀刻微负载的方法

    公开(公告)号：US08518282B2

    公开(公告)日：2013-08-27

    申请号：US12744012

    申请日：2008-11-13

    申请人： Wonchul Lee ,  Qian Fu ,  Shenjian Liu ,  Bryan Pu

    发明人： Wonchul Lee ,  Qian Fu ,  Shenjian Liu ,  Bryan Pu

    IPC分类号： B44C1/22 ,  H01L21/3065

    CPC分类号： H01L21/32136 ,  H01L21/32138

    摘要： A method for etching features of different aspect ratios in a tungsten containing layer is provided. An etch gas is provided containing a tungsten etch component and a deposition component. A plasma is formed from the provided etch gas. A tungsten containing layer patterned with wide and narrow features is etched with the provided plasma.

    摘要翻译： 提供了一种用于蚀刻含钨层中不同纵横比的特征的方法。 提供了含有钨蚀刻部件和沉积部件的蚀刻气体。 由所提供的蚀刻气体形成等离子体。 用所提供的等离子体蚀刻用宽而窄的特征图案化的含钨层。

    Method for reducing microloading in etching high aspect ratio structures
    9.
    发明授权
    Method for reducing microloading in etching high aspect ratio structures 有权
    蚀刻高纵横比结构中减少微载荷的方法

    公开(公告)号：US07629255B2

    公开(公告)日：2009-12-08

    申请号：US11757950

    申请日：2007-06-04

    申请人： Qian Fu ,  Shenjian Liu ,  Wonchul Lee ,  Bryan Pu

    发明人： Qian Fu ,  Shenjian Liu ,  Wonchul Lee ,  Bryan Pu

    IPC分类号： H01L21/44

    CPC分类号： H01L21/32139 ,  H01L21/32136 ,  H01L21/32137

    摘要： A method for etching features of different aspect ratios in a conductive layer is provided. The method comprises: depositing over the conductive layer with an aspect ratio dependent deposition; etching features into the conductive layer with an aspect ratio dependent etching of the conductive layer; and repeating the depositing and the etching at least once.

    摘要翻译： 提供了一种用于蚀刻导电层中不同宽高比特征的方法。 该方法包括：在长宽比依赖沉积物上沉积导电层; 将导电层的纵横比依赖蚀刻蚀刻到导电层中; 并重复沉积和蚀刻至少一次。

    Pulsed bias plasma process to control microloading
    10.
    发明授权
    Pulsed bias plasma process to control microloading 有权
    脉冲偏压等离子体工艺来控制微载荷

    公开(公告)号：US08609546B2

    公开(公告)日：2013-12-17

    申请号：US12744588

    申请日：2008-11-18

    申请人： Wonchul Lee ,  Qian Fu ,  Shenjian Liu ,  Bryan Pu

    发明人： Wonchul Lee ,  Qian Fu ,  Shenjian Liu ,  Bryan Pu

    IPC分类号： H01L21/302 ,  H01L21/461

    CPC分类号： H01L21/32136

    摘要： A method for etching a conductive layer through a mask with wider and narrower features is provided. A steady state etch gas is flowed. A steady state RF power is provided to form a plasma from the etch gas. A pulsed bias voltage is provided during the steady state etch gas flow, wherein the pulsed bias voltage has a frequency between 1 to 10,000 Hz. Wider and narrower features are etched into the conductive layer using the plasma formed from the etch gas.

    摘要翻译： 提供了通过具有更宽和更窄特征的掩模蚀刻导电层的方法。 稳态蚀刻气体流过。 提供稳态RF功率以从蚀刻气体形成等离子体。 在稳态蚀刻气流期间提供脉冲偏压，其中脉冲偏压具有1至10,000Hz之间的频率。 使用由蚀刻气体形成的等离子体将更宽和更窄的特征蚀刻到导电层中。