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公开(公告)号：US20090291701A1
公开(公告)日：2009-11-26
申请号：US12222646
申请日：2008-08-13
IPC分类号： H04Q7/20
CPC分类号： H04W74/04 , H04W72/1215 , H04W88/06
摘要： In a non-limiting and exemplary embodiment, a method is provided for controlling co-existence of multiple radio access units. The method comprises: receiving a scheduling request comprising value information on at least some of radio independent scheduling parameters of a control interface common to a plurality of radio access units, scheduling radio access on the basis of the value information on at least some of the radio independent scheduling parameters, and sending a response to the scheduling request in a given form in accordance with the control interface common to the radio access units.
摘要翻译： 在非限制性和示例性实施例中，提供了一种用于控制多个无线电接入单元的共存的方法。 该方法包括：接收包括关于多个无线电接入单元公用的控制接口的无线电独立调度参数的至少一些的值信息的调度请求，基于关于至少一些无线电接入点的值信息来调度无线电接入 独立的调度参数，并且根据无线电接入单元共同的控制接口以给定的形式向调度请求发送响应。
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2.发明授权Method, apparatus, and computer program product for fast context switching of application specific processors 有权用于应用程序特定处理器快速上下文切换的方法，设备和计算机程序产品公开(公告)号：US08909892B2
公开(公告)日：2014-12-09
申请号：US13524266
申请日：2012-06-15
IPC分类号： G06F15/80
CPC分类号： G06F9/463 , G06F9/30181 , G06F12/02 , Y02D10/13
摘要： Embodiments of the invention enable fast context switching of application specific processors having functional units with an architecturally visible state. In example embodiments, a processor allocates memory space to store two process control blocks for two active tasks to be performed by the processor comprising one or more custom functional units having a respective processing state not accessible by the processor. A memory controller stores the processing state of the custom functional units currently running a first active task, in a first process control block, in response to a preemptive task switch requirement. The memory controller loads a second processing state of the custom functional units for a second active task, from a second process control block in the memory, in response to the preemptive task switch requirement. The processor may then perform the second active task, based on the second processing state loaded into the custom functional units.
摘要翻译： 本发明的实施例能够实现具有具有架构可见状态的功能单元的应用特定处理器的快速上下文切换。 在示例实施例中，处理器分配存储器空间以存储要由处理器执行的两个活动任务的两个过程控制块，所述处理器包括具有处理器不可访问的相应处理状态的一个或多个定制功能单元。 存储器控制器响应于抢占任务切换要求，将当前运行第一活动任务的定制功能单元的处理状态存储在第一进程控制块中。 存储器控制器响应于先占任务切换要求，从存储器中的第二进程控制块加载用于第二活动任务的定制功能单元的第二处理状态。 然后，处理器可以基于加载到定制功能单元中的第二处理状态来执行第二活动任务。
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3.发明授权Method, apparatus, and computer program product for inter-core communication in multi-core processors 有权用于多核处理器中核心间通信的方法，设备和计算机程序产品公开(公告)号：US08819345B2
公开(公告)日：2014-08-26
申请号：US13399048
申请日：2012-02-17
IPC分类号： G06F12/08
CPC分类号： G06F12/084 , G06F9/544 , G06F12/0284 , G06F12/0806 , G06F15/167 , Y02D10/13
摘要： Method, apparatus, and computer program product embodiments of the invention are disclosed for efficient communication between processor units in a multi-core processor integrated circuit architecture. In example embodiments of the invention, a method comprises: storing with a shared inter-core communication unit in a multi-core processor, first data produced by a producer processor core, in a first token memory located at a first memory address of a memory address space; and connecting with the shared inter-core communication unit, the first token memory to a consumer processor core of the multi-core processor, to load the first data from the first token memory into the consumer processor core, in response to a first-type command from the producer processor core.
摘要翻译： 公开了用于多核处理器集成电路架构中的处理器单元之间的有效通信的本发明的方法，装置和计算机程序产品实施例。 在本发明的示例性实施例中，一种方法包括：将多个核心处理器中的共享核心间通信单元存储在生产者处理器核心产生的第一数据库中，位于位于存储器的第一存储器地址的第一令牌存储器 地址空间; 以及将所述共享核心间通信单元，所述第一令牌存储器连接到所述多核处理器的消费者处理器核心，以将所述第一数据从所述第一令牌存储器加载到所述消费者处理器核心中，以响应于所述第一类型 来自生产者处理器核心的命令。
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4.发明申请METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR FAST CONTEXT SWITCHING OF APPLICATION SPECIFIC PROCESSORS 有权方法，装置和计算机程序产品用于应用特定处理器的快速上下文切换公开(公告)号：US20130339648A1
公开(公告)日：2013-12-19
申请号：US13524266
申请日：2012-06-15
IPC分类号： G06F12/02
CPC分类号： G06F9/463 , G06F9/30181 , G06F12/02 , Y02D10/13
摘要： Embodiments of the invention enable fast context switching of application specific processors having functional units with an architecturally visible state. In example embodiments, a processor allocates memory space to store two process control blocks for two active tasks to be performed by the processor comprising one or more custom functional units having a respective processing state not accessible by the processor. A memory controller stores the processing state of the custom functional units currently running a first active task, in a first process control block, in response to a preemptive task switch requirement. The memory controller loads a second processing state of the custom functional units for a second active task, from a second process control block in the memory, in response to the preemptive task switch requirement. The processor may then perform the second active task, based on the second processing state loaded into the custom functional units.
摘要翻译： 本发明的实施例能够实现具有具有架构可见状态的功能单元的应用特定处理器的快速上下文切换。 在示例实施例中，处理器分配存储器空间以存储要由处理器执行的两个活动任务的两个过程控制块，所述处理器包括具有处理器不可访问的相应处理状态的一个或多个定制功能单元。 存储器控制器响应于抢占任务切换要求，将当前运行第一活动任务的定制功能单元的处理状态存储在第一进程控制块中。 存储器控制器响应于先占任务切换要求，从存储器中的第二进程控制块加载用于第二活动任务的定制功能单元的第二处理状态。 然后，处理器可以基于加载到定制功能单元中的第二处理状态来执行第二活动任务。
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5.发明申请METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR INTER-CORE COMMUNICATION IN MULTI-CORE PROCESSORS 有权用于多核处理器中内核通信的方法，设备和计算机程序产品公开(公告)号：US20130219130A1
公开(公告)日：2013-08-22
申请号：US13399048
申请日：2012-02-17
IPC分类号： G06F12/00
CPC分类号： G06F12/084 , G06F9/544 , G06F12/0284 , G06F12/0806 , G06F15/167 , Y02D10/13
摘要： Method, apparatus, and computer program product embodiments of the invention are disclosed for efficient communication between processor units in a multi-core processor integrated circuit architecture. In example embodiments of the invention, a method comprises: storing with a shared inter-core communication unit in a multi-core processor, first data produced by a producer processor core, in a first token memory located at a first memory address of a memory address space; and connecting with the shared inter-core communication unit, the first token memory to a consumer processor core of the multi-core processor, to load the first data from the first token memory into the consumer processor core, in response to a first-type command from the producer processor core.
摘要翻译： 公开了用于多核处理器集成电路架构中的处理器单元之间的有效通信的本发明的方法，装置和计算机程序产品实施例。 在本发明的示例性实施例中，一种方法包括：将多个核心处理器中的共享核心间通信单元存储在生产者处理器核心产生的第一数据库中，位于位于存储器的第一存储器地址的第一令牌存储器 地址空间; 以及将所述共享核心间通信单元，所述第一令牌存储器连接到所述多核处理器的消费者处理器核心，以将所述第一数据从所述第一令牌存储器加载到所述消费者处理器核心中，以响应于所述第一类型 来自生产者处理器核心的命令。
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6.发明授权公开(公告)号：US09698965B2
公开(公告)日：2017-07-04
申请号：US13877683
申请日：2011-09-30
CPC分类号： H04L5/1453 , H04L1/0001 , H04L5/1438 , H04L5/16 , H04W72/0453 , H04W72/1215 , H04W88/06
摘要： In accordance with an example embodiment of the present invention, an apparatus, comprising at least one processor; and at least one memory including computer program code; the at least one memory and the computer program code configured to, with the at least one processor, cause the apparatus to perform at least the following: deciding to switch to a half-duplex mode of operations upon detecting a triggering condition including that multiple radio stacks are activated at the apparatus simultaneously; signaling an associated base station the decision of switching to the half-duplex mode half-duplex mode; and entering the half-duplex mode of operation, is disclosed.
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公开(公告)号：US20100291942A1
公开(公告)日：2010-11-18
申请号：US12810865
申请日：2008-12-23
申请人： Antti-Veikko Sakari Piipponen , Kalle August Raiskila , Pasi Johannes Rinne-Rahkola , Tommi Juhani Zetterman , Heikki Ilmari Berg
发明人： Antti-Veikko Sakari Piipponen , Kalle August Raiskila , Pasi Johannes Rinne-Rahkola , Tommi Juhani Zetterman , Heikki Ilmari Berg
IPC分类号： H04W72/04
CPC分类号： H04B1/0003
摘要： In a first aspect an exemplary embodiment of the invention provides a method that includes instantiating a plurality of radio protocols, operating the plurality of radio protocols with an underlying physical layer, where each instantiation of a same radio protocol is embodied in a same code module and where each instantiation has associated data stored in a memory. The operating of the plurality of radio protocols comprises executing each instantiation of the radio protocols so that a portion of resources are shared between different instantiations of the radio protocols and different instantiations of radio protocols do not interfere with each other.
摘要翻译： 在第一方面，本发明的示例性实施例提供了一种方法，其包括实例化多个无线电协议，用下层物理层操作多个无线电协议，其中相同无线电协议的每个实例化体现在相同的代码模块中， 其中每个实例化具有存储在存储器中的相关联的数据。 多个无线电协议的操作包括执行无线电协议的每个实例化，使得一部分资源在无线电协议的不同实例之间共享，并且无线电协议的不同实例不彼此干扰。
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公开(公告)号：US20100115528A1
公开(公告)日：2010-05-06
申请号：US12609261
申请日：2009-10-30
CPC分类号： H04B1/0003 , H04W16/14 , H04W72/10
摘要： A method for providing a division of SDR RA into operational states is described. The method includes, in a device which including a plurality of shared device resources and a plurality of RAs, receiving, from a first RA, a request to change a state of the first RA to a requested active state. The requested active state is one of a plurality of potential active states for the first RA and each potential active state has an associated set of device resource requirements. The method also includes determining whether sufficient device resources exist for the requested active state based at least in part on currently allocated device resources. In response to a determination that sufficient device resources exist, the change to the requested active state for the first RA is approved. Apparatus and computer readable media are also described.
摘要翻译： 描述了一种将SDR RA划分成操作状态的方法。 该方法包括在包括多个共享设备资源和多个RA的设备中，从第一RA接收将第一RA的状态改变为所请求的活动状态的请求。 所请求的活动状态是第一RA的多个潜在活动状态之一，并且每个潜在活动状态具有相关的设备资源需求集合。 该方法还包括至少部分地基于当前分配的设备资源来确定是否存在针对所请求的活动状态的足够的设备资源。 响应于确定存在足够的设备资源，对第一RA的所请求的活动状态的改变被批准。 还描述了装置和计算机可读介质。
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公开(公告)号：US09654149B2
公开(公告)日：2017-05-16
申请号：US12810865
申请日：2008-12-23
申请人： Antti-Veikko Sakari Piipponen , Kalle August Raiskila , Pasi Johannes Rinne-Rahkola , Tommi Juhani Zetterman , Heikki Ilmari Berg
发明人： Antti-Veikko Sakari Piipponen , Kalle August Raiskila , Pasi Johannes Rinne-Rahkola , Tommi Juhani Zetterman , Heikki Ilmari Berg
CPC分类号： H04B1/0003
摘要： In a first aspect an exemplary embodiment of the invention provides a method that includes instantiating a plurality of radio protocols, operating the plurality of radio protocols with an underlying physical layer, where each instantiation of a same radio protocol is embodied in a same code module and where each instantiation has associated data stored in a memory. The operating of the plurality of radio protocols comprises executing each instantiation of the radio protocols so that a portion of resources are shared between different instantiations of the radio protocols and different instantiations of radio protocols do not interfere with each other.
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公开(公告)号：US08340706B2
公开(公告)日：2012-12-25
申请号：US12222646
申请日：2008-08-13
IPC分类号： H04B7/00
CPC分类号： H04W74/04 , H04W72/1215 , H04W88/06
摘要： In a non-limiting and exemplary embodiment, a method is provided for controlling co-existence of multiple radio access units. The method comprises: receiving a scheduling request comprising value information on at least some of radio independent scheduling parameters of a control interface common to a plurality of radio access units, scheduling radio access on the basis of the value information on at least some of the radio independent scheduling parameters, and sending a response to the scheduling request in a given form in accordance with the control interface common to the radio access units.
摘要翻译： 在非限制性和示例性实施例中，提供了一种用于控制多个无线电接入单元的共存的方法。 该方法包括：接收包括关于多个无线电接入单元公用的控制接口的无线电独立调度参数的至少一些的值信息的调度请求，基于关于至少一些无线电接入点的值信息来调度无线电接入 独立的调度参数，并且根据无线电接入单元共同的控制接口以给定的形式向调度请求发送响应。
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