公开(公告)号：US20060209478A1

公开(公告)日：2006-09-21

申请号：US11358045

申请日：2006-02-22

Applicant: Katsuya Arai ,  Toshihiro Kougami ,  Masayuki Kamei

Inventor： Katsuya Arai ,  Toshihiro Kougami ,  Masayuki Kamei

IPC: H02H9/00

CPC classification number: H01L27/0262

Abstract: A semiconductor integrated circuit device includes: a protected circuit protected against electro-static discharge applied from outside the device; an SCR protection circuit having an anode terminal connected to a power line, a cathode terminal connected to a ground line and a trigger terminal; and a trigger circuit connected to the trigger terminal and including an RC circuit connected between the power line and the ground line.

Abstract translation: 一种半导体集成电路器件，包括：保护电路，用于防止从器件外部施加的静电放电; SCR保护电路，其具有连接到电力线的阳极端子，连接到接地线的阴极端子和触发端子; 以及连接到触发端子并且包括连接在电力线和接地线之间的RC电路的触发电路。

公开(公告)号：US08232600B2

公开(公告)日：2012-07-31

申请号：US12710762

申请日：2010-02-23

Applicant: Katsuya Arai ,  Toshihiro Kougami ,  Hiroaki Yabu

Inventor： Katsuya Arai ,  Toshihiro Kougami ,  Hiroaki Yabu

IPC: H01L23/62

CPC classification number: H01L27/088 ,  H01L21/823481 ,  H01L27/0266 ,  H01L27/0274

Abstract: A semiconductor integrated circuit includes: a well 35 of a first conductivity type formed on a substrate 37; a first external terminal 10, a second external terminal 11, and a third external terminal 12 provided above the substrate 37; a first protection circuit 20 provided on an electrical path between the first external terminal 10 and the second external terminal 11; a second protection circuit 21 provided on an electrical path between the second external terminal 11 and the third external terminal 12; and a third protection circuit 22 provided on an electrical path between the third external terminal 12 and the first external terminal 10. A guard ring 40 is formed continuously in the well to surround at least two circuits among the first, second, and third protection circuits 20, 21, and 22, formed on the well 35.

Abstract translation: 半导体集成电路包括：形成在基板37上的第一导电类型的阱35; 设置在基板37上方的第一外部端子10，第二外部端子11和第三外部端子12; 设置在第一外部端子10和第二外部端子11之间的电气路径上的第一保护电路20; 设置在第二外部端子11和第三外部端子12之间的电气路径上的第二保护电路21; 以及设置在第三外部端子12和第一外部端子10之间的电气路径上的第三保护电路22.保护环40连续形成在阱中以围绕第一，第二和第三保护电路中的至少两个电路 20,31和22形成在井35上。

公开(公告)号：US20120169402A1

公开(公告)日：2012-07-05

申请号：US13417548

申请日：2012-03-12

Applicant: TOSHIAKI KAWASAKI ,  YASUHIRO AGATA ,  MASANORI SHIRAHAMA ,  TOSHIHIRO KOUGAMI ,  KATSUYA ARAI

Inventor： TOSHIAKI KAWASAKI ,  YASUHIRO AGATA ,  MASANORI SHIRAHAMA ,  TOSHIHIRO KOUGAMI ,  KATSUYA ARAI

IPC: H01H37/76

CPC classification number: H01L27/0207 ,  G11C17/18 ,  H01L23/5256 ,  H01L27/0288 ,  H01L27/10 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes an electric fuse circuit and a program protective circuit. The electric fuse circuit includes a fuse element and a transistor connected together in series and placed between a program power supply and a grounding, and controlling sections. The program protective circuit is placed in parallel with the electric fuse circuit and between the program power supply and the grounding. When a surge voltage is applied between the program power supply and the grounding, the foregoing structure allows a part of a surge electric current can flow through the program protective circuit.

Abstract translation: 半导体器件包括电熔丝电路和程序保护电路。 电熔丝电路包括串联连接在一起的一个熔丝元件和一个晶体管，并放置在一个程序电源和一个接地之间，以及控制部分。 程序保护电路与电熔丝电路并联在程序电源和接地之间。 当在程序电源和接地之间施加浪涌电压时，上述结构允许一部分浪涌电流可以流过程序保护电路。

公开(公告)号：US20110102954A1

公开(公告)日：2011-05-05

申请号：US12819512

申请日：2010-06-21

Applicant: Katsuya ARAI ,  Toshihiro Kougami

Inventor： Katsuya ARAI ,  Toshihiro Kougami

IPC: H02H9/04

CPC classification number: H02H9/046

Abstract: A semiconductor integrated circuit includes a first functional circuit block; a second functional circuit block; a relay circuit block; a first protection circuit block; and a second protection circuit block. The first protection circuit block includes an ESD protection circuit connected between either one of a first high-voltage power supply line and a first low-voltage power supply line, and either one of a third high-voltage power supply line and a third low-voltage power supply line. The second protection circuit block includes an ESD protection circuit connected between either one of a second high-voltage power supply line and a second low-voltage power supply line, and either one of the third high-voltage power supply line and the third low-voltage power supply line.

Abstract translation: 半导体集成电路包括第一功能电路块; 第二功能电路块; 继电器电路块; 第一保护电路块; 和第二保护电路块。 第一保护电路块包括连接在第一高压电源线和第一低压电源线之一以及第三高压电源线和第三低压电源线中的任一个之间的ESD保护电路， 电压电源线。 第二保护电路块包括连接在第二高压电源线和第二低压电源线之一以及第三高压电源线和第三低压电源线中的任一个之间的ESD保护电路， 电压电源线。

公开(公告)号：US07440248B2

公开(公告)日：2008-10-21

申请号：US11358045

申请日：2006-02-22

Applicant: Katsuya Arai ,  Toshihiro Kougami ,  Masayuki Kamei

Inventor： Katsuya Arai ,  Toshihiro Kougami ,  Masayuki Kamei

IPC: H02H3/20 ,  H02H3/22 ,  H02H9/04

CPC classification number: H01L27/0262

Abstract: A semiconductor integrated circuit device includes: a protected circuit protected against electro-static discharge applied from outside the device; an SCR protection circuit having an anode terminal connected to a power line, a cathode terminal connected to a ground line and a trigger terminal; and a trigger circuit connected to the trigger terminal and including an RC circuit connected between the power line and the ground line.

Abstract translation: 一种半导体集成电路器件，包括：保护电路，用于防止从器件外部施加的静电放电; SCR保护电路，其具有连接到电力线的阳极端子，连接到接地线的阴极端子和触发端子; 以及连接到触发端子并且包括连接在电力线和接地线之间的RC电路的触发电路。

公开(公告)号：US20100148267A1

公开(公告)日：2010-06-17

申请号：US12710762

申请日：2010-02-23

Applicant: Katsuya ARAI ,  Toshihiro Kougami ,  Hiroaki Yabu

Inventor： Katsuya ARAI ,  Toshihiro Kougami ,  Hiroaki Yabu

IPC: H01L27/088 ,  H01L23/58

CPC classification number: H01L27/088 ,  H01L21/823481 ,  H01L27/0266 ,  H01L27/0274

Abstract: A semiconductor integrated circuit includes: a well 35 of a first conductivity type formed on a substrate 37; a first external terminal 10, a second external terminal 11, and a third external terminal 12 provided above the substrate 37; a first protection circuit 20 provided on an electrical path between the first external terminal 10 and the second external terminal 11; a second protection circuit 21 provided on an electrical path between the second external terminal 11 and the third external terminal 12; and a third protection circuit 22 provided on an electrical path between the third external terminal 12 and the first external terminal 10. A guard ring 40 is formed continuously in the well to surround at least two circuits among the first, second, and third protection circuits 20, 21, and 22, formed on the well 35.

Abstract translation: 半导体集成电路包括：形成在基板37上的第一导电类型的阱35; 设置在基板37上方的第一外部端子10，第二外部端子11和第三外部端子12; 设置在第一外部端子10和第二外部端子11之间的电气路径上的第一保护电路20; 设置在第二外部端子11和第三外部端子12之间的电气路径上的第二保护电路21; 以及设置在第三外部端子12和第一外部端子10之间的电气路径上的第三保护电路22.保护环40连续形成在阱中以围绕第一，第二和第三保护电路中的至少两个电路 20,31和22形成在井35上。

公开(公告)号：US08203184B2

公开(公告)日：2012-06-19

申请号：US12710762

申请日：2010-02-23

Applicant: Katsuya Arai ,  Toshihiro Kougami ,  Hiroaki Yabu

Inventor： Katsuya Arai ,  Toshihiro Kougami ,  Hiroaki Yabu

IPC: H01L23/62

Abstract: A semiconductor integrated circuit includes: a well 35 of a first conductivity type formed on a substrate 37; a first external terminal 10, a second external terminal 11, and a third external terminal 12 provided above the substrate 37; a first protection circuit 20 provided on an electrical path between the first external terminal 10 and the second external terminal 11; a second protection circuit 21 provided on an electrical path between the second external terminal 11 and the third external terminal 12; and a third protection circuit 22 provided on an electrical path between the third external terminal 12 and the first external terminal 10. A guard ring 40 is formed continuously in the well to surround at least two circuits among the first, second, and third protection circuits 20, 21, and 22, formed on the well 35.

公开(公告)号：US20100207163A1

公开(公告)日：2010-08-19

申请号：US12771585

申请日：2010-04-30

Applicant: Hiroaki YABU ,  Katsuya Arai ,  Toshihiro Kougami

Inventor： Hiroaki YABU ,  Katsuya Arai ,  Toshihiro Kougami

IPC: H01L23/60

CPC classification number: H01L27/0262 ,  H01L27/0921

Abstract: A semiconductor device includes a protected circuit and an electrostatic-discharge protection circuit. The electrostatic-discharge protection circuit includes a first well of a first conductivity type and a second well of a second conductivity type formed in contact with each other in a semiconductor substrate, a first impurity diffusion layer of the first conductivity type and a third impurity diffusion layer of the second conductivity type formed apart from each other in the first well, and a second impurity diffusion layer of the second conductivity type and a fourth impurity diffusion layer of the first conductivity type formed apart from each other in the second well. The second and the third impurity diffusion layers are formed adjacent to each other interposing an element isolation region provided across a border between the first and the second wells.

Abstract translation: 半导体器件包括保护电路和静电放电保护电路。 静电放电保护电路包括第一导电类型的第一阱和在半导体衬底中彼此接触形成的第二导电类型的第二阱，第一导电类型的第一杂质扩散层和第三杂质扩散 在第一阱中彼此分离形成的第二导电类型的层，以及第二导电类型的第二杂质扩散层和第二导电类型的第四杂质扩散层彼此分开形成。 第二和第三杂质扩散层彼此相邻地形成，插入设置在第一和第二阱之间的边界处的元件隔离区域。

公开(公告)号：US08384466B2

公开(公告)日：2013-02-26

申请号：US13417548

申请日：2012-03-12

Applicant: Toshiaki Kawasaki ,  Yasuhiro Agata ,  Masanori Shirahama ,  Toshihiro Kougami ,  Katsuya Arai

Inventor： Toshiaki Kawasaki ,  Yasuhiro Agata ,  Masanori Shirahama ,  Toshihiro Kougami ,  Katsuya Arai

IPC: H01H37/76

CPC classification number: H01L27/0207 ,  G11C17/18 ,  H01L23/5256 ,  H01L27/0288 ,  H01L27/10 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes an electric fuse circuit and a program protective circuit. The electric fuse circuit includes a fuse element and a transistor connected together in series and placed between a program power supply and a grounding, and controlling sections. The program protective circuit is placed in parallel with the electric fuse circuit and between the program power supply and the grounding. When a surge voltage is applied between the program power supply and the grounding, the foregoing structure allows a part of a surge electric current can flow through the program protective circuit.

Abstract translation: 半导体器件包括电熔丝电路和程序保护电路。 电熔丝电路包括串联连接在一起的一个熔丝元件和一个晶体管，并放置在一个程序电源和一个接地之间，以及控制部分。 程序保护电路与电熔丝电路并联在程序电源和接地之间。 当在程序电源和接地之间施加浪涌电压时，上述结构允许一部分浪涌电流可以流过程序保护电路。