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    Shielded integrated circuit package
    1.
    发明授权
    Shielded integrated circuit package 有权
    屏蔽集成电路封装

    公开(公告)号：US07071545B1

    公开(公告)日：2006-07-04

    申请号：US10323658

    申请日：2002-12-20

    申请人： Viresh Patel ,  Mohan Kirloskar

    发明人： Viresh Patel ,  Mohan Kirloskar

    IPC分类号： H01L23/02

    CPC分类号： H01L23/49537 ,  H01L23/3135 ,  H01L23/49575 ,  H01L23/552 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

    摘要： An integrated circuit package is provided. The package includes a die attach pad having a first side and a second side. A first semiconductor die is mounted to the first side of the die attach pad, a plurality of contact pads disposed in close proximity to the first semiconductor die. A first plurality of wire bonds connect the first semiconductor die and ones of the contact pads. An overmold encapsulates the first plurality of wire bonds and the first semiconductor die, the die attach pad and the contact pads being embedded in the overmold. A plurality of leads are disposed proximal the second side of the die attach pad. A second semiconductor die is mounted to one of the second side of the die attach pad and ones of the plurality of leads such that the ones of the plurality of leads are electrically connected to the second semiconductor die. The second semiconductor die and the leads are embedded in an encapsulant. The die attach pad shields the second semiconductor die.

    摘要翻译： 提供集成电路封装。 该包装包括具有第一侧和第二侧的管芯附接垫。 第一半导体管芯安装到管芯附接焊盘的第一侧，多个接触焊盘设置在第一半导体管芯附近。 第一多个线接合将第一半导体管芯和接触焊盘之一连接。 包覆模制封装了第一多个引线键合，并且第一半导体管芯，管芯附接焊盘和接触焊盘嵌入包覆模制体中。 多个引线设置在管芯附接垫的第二侧附近。 第二半导体管芯安装在管芯附接焊盘的第二侧和多个引线中的一个上，使得多个引线中的一个引线电连接到第二半导体管芯。 第二半导体管芯和引线嵌入密封剂中。 管芯附接垫屏蔽第二半导体管芯。

    Shielded integrated circuit package
    5.
    发明授权
    Shielded integrated circuit package 有权
    屏蔽集成电路封装

    公开(公告)号：US07381588B1

    公开(公告)日：2008-06-03

    申请号：US10885966

    申请日：2004-07-08

    申请人： Viresh Patel ,  Mohan Kirloskar

    发明人： Viresh Patel ,  Mohan Kirloskar

    IPC分类号： H01L21/00

    CPC分类号： H01L23/49537 ,  H01L23/3135 ,  H01L23/49575 ,  H01L23/552 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

    摘要： An integrated circuit package is provided. The package includes a die attach pad having a first side and a second side. A first semiconductor die is mounted to the first side of the die attach pad, a plurality of contact pads disposed in close proximity to the first semiconductor die. A first plurality of wire bonds connect the first semiconductor die and ones of the contact pads. An overmold encapsulates the first plurality of wire bonds and the first semiconductor die, the die attach pad and the contact pads being embedded in the overmold. A plurality of leads are disposed proximal the second side of the die attach pad. A second semiconductor die is mounted to one of the second side of the die attach pad and ones of the plurality of leads such that the ones of the plurality of leads are electrically connected to the second semiconductor die. The second semiconductor die and the leads are embedded in an encapsulant. The die attach pad shields the second semiconductor die.

    摘要翻译： 提供集成电路封装。 该包装包括具有第一侧和第二侧的管芯附接垫。 第一半导体管芯安装到管芯附接焊盘的第一侧，多个接触焊盘设置在第一半导体管芯附近。 第一多个线接合将第一半导体管芯和接触焊盘之一连接。 包覆模制封装了第一多个引线键合，并且第一半导体管芯，管芯附接焊盘和接触焊盘嵌入包覆模制体中。 多个引线设置在管芯附接垫的第二侧附近。 第二半导体管芯安装在管芯附接焊盘的第二侧和多个引线中的一个上，使得多个引线中的一个引线电连接到第二半导体管芯。 第二半导体管芯和引线嵌入密封剂中。 管芯附接垫屏蔽第二半导体管芯。