公开(公告)号：US20070203596A1

公开(公告)日：2007-08-30

申请号：US11463019

申请日：2006-08-08

申请人： Baoqian Huang ,  Weijun Xu

发明人： Baoqian Huang ,  Weijun Xu

IPC分类号： G06F17/00 ,  H04H5/00

CPC分类号： H04H20/48

摘要： An integrated circuit chip is described. The integrated circuit chip includes an audio input section for accepting audio signal, a digital signal processing section for processing the audio signal to perform audio encoding and frequency modulating, a frequency modulation signal processing section for up converting and transmitting the digital signal processor processed signal as a radio frequency signal and a frequency synthesizer for providing desired frequencies.

摘要翻译： 描述了集成电路芯片。 集成电路芯片包括用于接受音频信号的音频输入部分，用于处理音频信号以执行音频编码和频率调制的数字信号处理部分，用于上变频和发送数字信号处理器处理信号的频率调制信号处理部分， 射频信号和用于提供期望频率的频率合成器。

公开(公告)号：USD1013752S1

公开(公告)日：2024-02-06

申请号：US29784508

申请日：2021-05-19

申请人： Weijun Xu

设计人： Weijun Xu

摘要： FIG. 1 is a perspective view of a mechanical stage for microscope showing my new design;
FIG. 2 is another perspective view thereof;
FIG. 3 is a front elevational view thereof;
FIG. 4 is a rear elevational view thereof;
FIG. 5 is a left side elevational view thereof;
FIG. 6 is a right side elevational view thereof;
FIG. 7 is a top plan view thereof; and,
FIG. 8 is a bottom plan view thereof.
The broken lines in the drawings depict portions of the mechanical stage for microscope that form no part of the claimed design.

公开(公告)号：USD1016873S1

公开(公告)日：2024-03-05

申请号：US29783387

申请日：2021-05-12

申请人： Weijun Xu

设计人： Weijun Xu

摘要： FIG. 1 is a perspective view of a microscope showing my new design;
FIG. 2 is another perspective view thereof;
FIG. 3 is a front elevational view thereof;
FIG. 4 is a rear elevational view thereof;
FIG. 5 is a left side elevational view thereof;
FIG. 6 is a right side elevational view thereof;
FIG. 7 is a top plan view thereof; and
FIG. 8 is a bottom plan view thereof.
FIG. 9 is an enlarged view of portion 9 shown in FIG. 1; and,
FIG. 10 is an enlarged view of portion 10 shown in FIG. 1.
The evenly dashed broken lines in the drawings depict portions of the microscope that form no part of the claimed design. The unevenly dashed broken lines in FIGS. 1, 9, and 10 demarcate the enlarged views and form no part of the claimed design.

公开(公告)号：US08462268B2

公开(公告)日：2013-06-11

申请号：US12965351

申请日：2010-12-10

申请人： Seamus Ryan ,  Weijun Xu ,  Tianjiang Li ,  Wei Che ,  Niall O'Connell

发明人： Seamus Ryan ,  Weijun Xu ,  Tianjiang Li ,  Wei Che ,  Niall O'Connell

IPC分类号： H04N9/475 ,  H04N5/06 ,  H03L7/00 ,  H03L7/06 ,  G09G5/02

CPC分类号： H04N5/06 ,  H04N5/46 ,  H04N21/4305 ,  H04N21/440281

摘要： Embodiments of the present invention may provide a clock and timing generation scheme for a video signal processor (e.g., a scaler), which enables fast switching between different input video standards without disturbing the output clock or timing. The scheme also may minimize the number of video frames that are dropped or repeated at the output. This may be achieved by locking the video's output timing to the input timing and also by utilizing a frame buffer to remove instantaneous discontinuities caused when an input is changed.

摘要翻译： 本发明的实施例可以为视频信号处理器（例如，缩放器）提供时钟和定时生成方案，其能够在不影响输出时钟或定时的情况下实现不同输入视频标准之间的快速切换。 该方案还可以最小化在输出处丢弃或重复的视频帧的数量。 这可以通过将视频的输出定时锁定到输入定时以及利用帧缓冲器来消除当输入改变时引起的瞬时不连续性来实现。

公开(公告)号：US20120147267A1

公开(公告)日：2012-06-14

申请号：US12965351

申请日：2010-12-10

申请人： Seamus RYAN ,  Weijun XU ,  Tianjiang LI ,  Wei CHE ,  Niall O'CONNELL

发明人： Seamus RYAN ,  Weijun XU ,  Tianjiang LI ,  Wei CHE ,  Niall O'CONNELL

IPC分类号： H04N5/06

CPC分类号： H04N5/06 ,  H04N5/46 ,  H04N21/4305 ,  H04N21/440281

摘要： Embodiments of the present invention may provide a clock and timing generation scheme for a video signal processor (e.g., a scaler), which enables fast switching between different input video standards without disturbing the output clock or timing. The scheme also may minimize the number of video frames that are dropped or repeated at the output. This may be achieved by locking the video's output timing to the input timing and also by utilizing a frame buffer to remove instantaneous discontinuities caused when an input is changed.

摘要翻译： 本发明的实施例可以为视频信号处理器（例如，缩放器）提供时钟和定时生成方案，其能够在不影响输出时钟或定时的情况下实现不同输入视频标准之间的快速切换。 该方案还可以最小化在输出处丢弃或重复的视频帧的数量。 这可以通过将视频的输出定时锁定到输入定时以及利用帧缓冲器来消除当输入改变时引起的瞬时不连续性来实现。

公开(公告)号：USD985684S1

公开(公告)日：2023-05-09

申请号：US29790122

申请日：2021-11-08

申请人： Weijun Xu

设计人： Weijun Xu

摘要： FIG. 1 is a first perspective view of a toy microscope showing my new design;
FIG. 2 is a second perspective view thereof;
FIG. 3 is a front view thereof;
FIG. 4 is a back view thereof;
FIG. 5 is a left side view thereof;
FIG. 6 is a right side view thereof;
FIG. 7 is a top view thereof;
FIG. 8 is a bottom view thereof;
FIG. 9 is an enlarged view of the selected portion of FIG. 1;
FIG. 10 is an enlarged view of the selected portion of FIG. 1; and,
FIG. 11 is an enlarged view of the selected portion of FIG. 2.
The evenly spaced broken lines shown in the drawings depict portions of the toy microscope that form no part of the claimed design; the unevenly spaced broken lines shown in FIGS. 1, 2, and 9-11 indicate outer limits of enlarged views and form no part of the claimed design.