Method and apparatus utilizing datapath line minimization to generate
datapath floor plan for integrated circuit
    1.
    发明授权
    Method and apparatus utilizing datapath line minimization to generate datapath floor plan for integrated circuit 失效
    利用数据通路线最小化生成集成电路数据通路平面图的方法和装置

    公开(公告)号:US5812417A

    公开(公告)日:1998-09-22

    申请号:US668653

    申请日:1996-06-24

    申请人: Whu-Ming Young

    发明人: Whu-Ming Young

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5045

    摘要: A technique for configuring multiple datapath components into a one-dimensional datapath sequence to form a datapath module that provides a specified function entails counting the number of instances in which a datapath line non-redundantly passes a datapath component in each of a plurality of different one-dimensional configurations of the datapath components for which ports of the datapath components and, as necessary, the datapath module are interconnected through datapath lines to provide the specified function. The datapath components are then placed in a particular one of the one-dimensional configurations for which the number of instances counted during the counting operation is a minimum, subject to any timing constraint. Before performing the counting and placing operations, a special procedure is preferably employed to reduce the number of configurations considered during the counting operation. The special procedure entails determining whether there is any datapath component having a single input port and a single output port. If so, an appropriate interconnection of each such single-input/single-output datapath component to another datapath component is established to form a larger datapath component, thereby reducing the number of non-interconnected datapath components. The present technique can be implemented manually and/or with apparatus such as a computer.

    摘要翻译: 将多个数据路径组件配置成一维数据路径序列以形成提供指定功能的数据路径模块的技术包括对数据路径线非冗余地通过多个不同的数据路径组件中的数据路径分量的实例数进行计数 数据路径组件的三维配置,数据路径组件的端口和必要时的数据路径模块通过数据路径线互连以提供指定的功能。 然后将数据通路组件放置在一维配置中的特定一个中,在计数操作期间计数的实例数量是最小的,受到任何时序限制。 在执行计数和放置操作之前,优选采用特殊的程序来减少在计数操作期间考虑的配置数量。 特殊程序需要确定是否有任何数据路径组件具有单个输入端口和单个输出端口。 如果是这样,则建立每个这样的单输入/单输出数据路径组件到另一个数据路径组件的适当互连,以形成更大的数据路径组件,从而减少非互连数据路径组件的数量。 本技术可以手动实现和/或与诸如计算机的装置一起实现。

    Use of ethernet frames for exchanging control and status information within an HPNA controller
    3.
    发明授权
    Use of ethernet frames for exchanging control and status information within an HPNA controller 有权
    使用以太网帧交换HPNA控制器内的控制和状态信息

    公开(公告)号:US08131879B1

    公开(公告)日:2012-03-06

    申请号:US10232300

    申请日:2002-08-30

    IPC分类号: G06F15/16 G06F15/177

    摘要: A method for providing control information between a host and a home phone line network via an Ethernet controller includes: determining if the control information is to be transmitted to the home phone line network or is received from the home phone line network; generating a first home phone line network data frame from a frame control frame (FCF) and a corresponding first Ethernet data frame received from the Ethernet controller, if the control information is to be transmitted to the home phone line network; and generating a second Ethernet data frame and a corresponding frame status frame (FSF) from a second home phone line network data frame received from the home phone line network, if the control information is received from the hoMe phone line network. Control information is thus provided between the host and the HPNA network via an Ethernet controller without requiring additional hardware or special interfaces.

    摘要翻译: 一种用于经由以太网控制器在主机与家庭电话线网络之间提供控制信息的方法包括:确定控制信息是否被发送到家庭电话线路网络,或从家庭电话线路网络接收; 如果将控制信息发送到家庭电话线网络,则从帧控制帧(FCF)生成第一家庭电话线网络数据帧和从以太网控制器接收的对应的第一以太网数据帧; 以及如果从hoMe电话线路网络接收到控制信息,则从家庭电话线路网络接收的第二家庭电话线网络数据帧生成第二以太网数据帧和对应的帧状态帧(FSF)。 因此,通过以太网控制器在主机和HPNA网络之间提供控制信息,而不需要额外的硬件或特殊接口。

    LIGHT-EMITTING DIODE NETWORK
    4.
    发明申请
    LIGHT-EMITTING DIODE NETWORK 审中-公开
    发光二极管网络

    公开(公告)号:US20120306392A1

    公开(公告)日:2012-12-06

    申请号:US13273785

    申请日:2011-10-14

    IPC分类号: H05B37/02

    摘要: LED devices or circuits include a number of serially connected LED segments, which may additionally include parallel branches, which are switched on or off depending on an input voltage to the LED segments. As the input voltage varies, none, different portions, or all of the LEDs are lit. The input voltage to the LED segments may be an output voltage from a bridge rectifier in response to an alternate current (AC) power. The LED devices or circuits include no inductors, transformers and electrolytic capacitors.

    摘要翻译: LED器件或电路包括多个串联的LED段,其可另外包括并联分支,其根据对LED段的输入电压而导通或截止。 随着输入电压的变化,没有,不同的部分或全部的LED点亮。 LED段的输入电压可以是响应于交流(AC)功率来自桥式整流器的输出电压。 LED器件或电路不包括电感器,变压器和电解电容器。

    Method for fabricating transistors in isolation regions in a substrate
    5.
    发明授权
    Method for fabricating transistors in isolation regions in a substrate 失效
    在衬底中隔离区域制造晶体管的方法

    公开(公告)号:US5622885A

    公开(公告)日:1997-04-22

    申请号:US483214

    申请日:1995-06-07

    摘要: An integrated circuit includes an N isolation buried layer underlying high density and low voltage type P channel and N channel transistors to define islands of arbitrary voltage on the substrate. Thus such transistors, which otherwise are capable only of low voltage operation, become capable of operating at high voltage relative to the substrate. This allows integration, on a single chip, of high voltage circuit elements with low voltage and high density transistors all formed by the same fabrication process sequence. In one example this allows creation of an 18 volt range charge pump using a CMOS process which normally provides only 3 volt operating range transistors. This then allows integration on a single integrated circuit chip of a complex digital logic function such as a UART (universal asynchronous receiver and transmitter) with a high voltage function such as an RS-232 interface, including integrated capacitors for the RS-232 interface charge pump.

    摘要翻译: 集成电路包括在高密度和低电压型P沟道下面的N隔离掩埋层和N沟道晶体管,以在衬底上限定任意电压的岛。 因此,否则仅能够进行低电压操作的这种晶体管能够相对于衬底在高电压下工作。 这允许在单个芯片上集成由具有低电压和高密度晶体管的高压电路元件,全部由相同的制造工艺顺序形成。 在一个示例中,这允许使用通常仅提供3伏工作范围晶体管的CMOS工艺来创建18伏范围的电荷泵。 这样就可以集成在具有高电压功能的UART(通用异步接收器和发送器)等复杂数字逻辑功能的单一集成电路芯片上,如RS-232接口,包括用于RS-232接口电荷的集成电容 泵。

    Method for driving an ink jet head having piezoelectric actuator
    6.
    发明申请
    Method for driving an ink jet head having piezoelectric actuator 审中-公开
    用于驱动具有压电致动器的喷墨头的方法

    公开(公告)号:US20070273731A1

    公开(公告)日:2007-11-29

    申请号:US11442407

    申请日:2006-05-26

    IPC分类号: B41J2/045

    摘要: A method for driving an ink jet head (10) having a piezoelectric actuator (103) includes the steps of: (a) transmitting a negative electrical pulse (31) to drive the piezoelectric actuator to transform in a manner such that ink is filled into an ink chamber (102) of the ink jet head; and (b) transmitting a positive electrical pulse (32) to drive the piezoelectric actuator to transform in a manner such that the ink is ejected out of the ink chamber.

    摘要翻译: 一种用于驱动具有压电致动器(103)的喷墨头(10)的方法包括以下步骤:(a)传送负电脉冲(31)以驱动压电致动器以使墨水被填充的方式变换 喷墨头的墨水室(102); 和(b)发送正电脉冲(32)以驱动压电致动器以使得墨水从墨室中喷出的方式变换。

    DSL link with scaleable performance
    7.
    发明授权
    DSL link with scaleable performance 有权
    DSL链接具有可扩展的性能

    公开(公告)号:US06836510B2

    公开(公告)日:2004-12-28

    申请号:US10054410

    申请日:2001-11-13

    IPC分类号: H04B138

    CPC分类号: H04L27/2601 H04M11/062

    摘要: A digital communications link, protocol and related circuits are provided which achieve a scaleable performance rate through a combination of clock scaling and/or variable frame sizing. The system is used within a personal computer, thus allowing the latter to be interoperable with any number of different communications protocols, including xDSL based transmission standards, and to set up communications links of varying capacity and performance.

    摘要翻译: 提供了数字通信链路,协议和相关电路,其通过时钟缩放和/或可变帧大小的组合来实现可扩展的性能速率。 该系统在个人计算机内使用,从而允许该系统与任何数量不同的通信协议(包括基于xDSL的传输标准)互操作,并建立不同容量和性能的通信链路。

    High voltage charge pump using low voltage type transistors
    8.
    发明授权
    High voltage charge pump using low voltage type transistors 失效
    高压电荷泵采用低压型晶体管

    公开(公告)号:US5786617A

    公开(公告)日:1998-07-28

    申请号:US556295

    申请日:1995-10-05

    摘要: An integrated circuit includes an N isolation buried layer underlying high density and low voltage type P channel and N channel transistors to define islands of arbitrary voltage on the substrate. Thus such transistors, which otherwise are capable only of low voltage operation, become capable of operating at high voltage relative to the substrate. This allows integration, on a single chip, of high voltage circuit elements with low voltage and high density transistors all formed by the same fabrication process sequence. In one example this allows creation of an 18 volt range charge pump using a CMOS process which normally provides only 3 volt operating range transistors. This then allows integration on a single integrated circuit chip of a complex digital logic function such as a UART (universal asynchronous receiver and transmitter) with a high voltage function such as an RS-232 interface, including integrated capacitors for the RS-232 interface charge pump.

    摘要翻译: 集成电路包括在高密度和低电压型P沟道下面的N隔离掩埋层和N沟道晶体管,以在衬底上限定任意电压的岛。 因此,否则仅能够进行低电压操作的这种晶体管能够相对于衬底在高电压下工作。 这允许在单个芯片上集成由具有低电压和高密度晶体管的高压电路元件,全部由相同的制造工艺顺序形成。 在一个示例中,这允许使用通常仅提供3伏工作范围晶体管的CMOS工艺来创建18伏范围的电荷泵。 这样就可以集成在具有高电压功能的UART(通用异步接收器和发送器)等复杂数字逻辑功能的单一集成电路芯片上,如RS-232接口,包括用于RS-232接口电荷的集成电容 泵。

    Integrated optical waveguide utilizing zinc oxide diffused into
congruent and magnesium oxide doped lithium niobate crystals
    10.
    发明授权
    Integrated optical waveguide utilizing zinc oxide diffused into congruent and magnesium oxide doped lithium niobate crystals 失效
    使用氧化锌的集成光波导扩散到掺杂铌酸锂的铌酸锂晶体中

    公开(公告)号:US5095518A

    公开(公告)日:1992-03-10

    申请号:US566153

    申请日:1990-08-10

    IPC分类号: G02B6/134

    CPC分类号: G02B6/1342

    摘要: An integrated optical waveguide is constructed from a lithium niobate (LiNbO.sub.3) crystal substrate. In preferred embodiments, a diffused layer is formed proximate to one surface of the substrate by sputtering a thin layer of a zinc-related oxide (e.g., ZnO, ZnLiNbO.sub.4, or the like) onto the surface and then annealing the substrate. The resulting concentration of zinc in the diffused layer forms a waveguide having desirable optical propagation characteristics. The substrate is preferably congruent lithium niobate. In particularly preferred embodiments, the substrate is magnesium oxide (MgO) doped lithium niobate.

    摘要翻译: 集成光波导由铌酸锂(LiNbO 3)晶体基板构成。 在优选实施例中,通过将锌相关氧化物(例如ZnO,ZnLiNbO 4等)的薄层溅射到表面上,然后对衬底进行退火,在衬底的一个表面附近形成扩散层。 所得到的扩散层中锌的浓度形成具有理想的光传播特性的波导。 所述底物优选是一致的铌酸锂。 在特别优选的实施方式中,衬底是掺杂了氧化镁(MgO)的铌酸锂。